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i2c-au1550: remove usage of volatile keyword

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Replace the usage of "volatile"s with register accessor functions.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Manuel Lauss 2011-10-22 13:34:36 +02:00 • committed by Ben Dooks
parent 1fdb24e969
commit c5de6467d2
2 changed files with 98 additions and 165 deletions
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13
arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
View file

@ -394,19 +394,6 @@ typedef struct psc_spi {
#define PSC_SPITXRX_LC (1 << 29) #define PSC_SPITXRX_LC (1 << 29)
#define PSC_SPITXRX_SR (1 << 28) #define PSC_SPITXRX_SR (1 << 28)
/* PSC in SMBus (I2C) Mode. */
typedef struct psc_smb {
u32 psc_sel;
u32 psc_ctrl;
u32 psc_smbcfg;
u32 psc_smbmsk;
u32 psc_smbpcr;
u32 psc_smbstat;
u32 psc_smbevnt;
u32 psc_smbtxrx;
u32 psc_smbtmr;
} psc_smb_t;
/* SMBus Config Register. */ /* SMBus Config Register. */
#define PSC_SMBCFG_RT_MASK (3 << 30) #define PSC_SMBCFG_RT_MASK (3 << 30)
#define PSC_SMBCFG_RT_FIFO1 (0 << 30) #define PSC_SMBCFG_RT_FIFO1 (0 << 30)

250
drivers/i2c/busses/i2c-au1550.c
View file

@ -39,29 +39,42 @@
#include <asm/mach-au1x00/au1xxx.h> #include <asm/mach-au1x00/au1xxx.h>
#include <asm/mach-au1x00/au1xxx_psc.h> #include <asm/mach-au1x00/au1xxx_psc.h>
#define PSC_SEL 0x00
#define PSC_CTRL 0x04
#define PSC_SMBCFG 0x08
#define PSC_SMBMSK 0x0C
#define PSC_SMBPCR 0x10
#define PSC_SMBSTAT 0x14
#define PSC_SMBEVNT 0x18
#define PSC_SMBTXRX 0x1C
#define PSC_SMBTMR 0x20
struct i2c_au1550_data { struct i2c_au1550_data {
u32 psc_base; void __iomem *psc_base;
int xfer_timeout; int xfer_timeout;
int ack_timeout; int ack_timeout;
struct i2c_adapter adap; struct i2c_adapter adap;
struct resource *ioarea; struct resource *ioarea;
}; };
static int static inline void WR(struct i2c_au1550_data *a, int r, unsigned long v)
wait_xfer_done(struct i2c_au1550_data *adap)
{ {
u32 stat; __raw_writel(v, a->psc_base + r);
int i; wmb();
volatile psc_smb_t *sp; }
sp = (volatile psc_smb_t *)(adap->psc_base); static inline unsigned long RD(struct i2c_au1550_data *a, int r)
{
return __raw_readl(a->psc_base + r);
}
/* Wait for Tx Buffer Empty static int wait_xfer_done(struct i2c_au1550_data *adap)
*/ {
int i;
/* Wait for Tx Buffer Empty */
for (i = 0; i < adap->xfer_timeout; i++) { for (i = 0; i < adap->xfer_timeout; i++) {
stat = sp->psc_smbstat; if (RD(adap, PSC_SMBSTAT) & PSC_SMBSTAT_TE)
au_sync();
if ((stat & PSC_SMBSTAT_TE) != 0)
return 0; return 0;
udelay(1); udelay(1);
@ -70,41 +83,27 @@ wait_xfer_done(struct i2c_au1550_data *adap)
return -ETIMEDOUT; return -ETIMEDOUT;
} }
static int static int wait_ack(struct i2c_au1550_data *adap)
wait_ack(struct i2c_au1550_data *adap)
{ {
u32 stat; unsigned long stat;
volatile psc_smb_t *sp;
if (wait_xfer_done(adap)) if (wait_xfer_done(adap))
return -ETIMEDOUT; return -ETIMEDOUT;
sp = (volatile psc_smb_t *)(adap->psc_base); stat = RD(adap, PSC_SMBEVNT);
stat = sp->psc_smbevnt;
au_sync();
if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0) if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0)
return -ETIMEDOUT; return -ETIMEDOUT;
return 0; return 0;
} }
static int static int wait_master_done(struct i2c_au1550_data *adap)
wait_master_done(struct i2c_au1550_data *adap)
{ {
u32 stat; int i;
int i;
volatile psc_smb_t *sp;
sp = (volatile psc_smb_t *)(adap->psc_base); /* Wait for Master Done. */
/* Wait for Master Done.
*/
for (i = 0; i < adap->xfer_timeout; i++) { for (i = 0; i < adap->xfer_timeout; i++) {
stat = sp->psc_smbevnt; if ((RD(adap, PSC_SMBEVNT) & PSC_SMBEVNT_MD) != 0)
au_sync();
if ((stat & PSC_SMBEVNT_MD) != 0)
return 0; return 0;
udelay(1); udelay(1);
} }
@ -115,29 +114,20 @@ wait_master_done(struct i2c_au1550_data *adap)
static int static int
do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q) do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q)
{ {
volatile psc_smb_t *sp; unsigned long stat;
u32 stat;
sp = (volatile psc_smb_t *)(adap->psc_base); /* Reset the FIFOs, clear events. */
stat = RD(adap, PSC_SMBSTAT);
/* Reset the FIFOs, clear events. WR(adap, PSC_SMBEVNT, PSC_SMBEVNT_ALLCLR);
*/
stat = sp->psc_smbstat;
sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
au_sync();
if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) { if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) {
sp->psc_smbpcr = PSC_SMBPCR_DC; WR(adap, PSC_SMBPCR, PSC_SMBPCR_DC);
au_sync(); while ((RD(adap, PSC_SMBPCR) & PSC_SMBPCR_DC) != 0)
do { cpu_relax();
stat = sp->psc_smbpcr;
au_sync();
} while ((stat & PSC_SMBPCR_DC) != 0);
udelay(50); udelay(50);
} }
/* Write out the i2c chip address and specify operation /* Write out the i2c chip address and specify operation */
*/
addr <<= 1; addr <<= 1;
if (rd) if (rd)
addr |= 1; addr |= 1;
@ -146,56 +136,42 @@ do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q)
if (q) if (q)
addr |= PSC_SMBTXRX_STP; addr |= PSC_SMBTXRX_STP;
/* Put byte into fifo, start up master. /* Put byte into fifo, start up master. */
*/ WR(adap, PSC_SMBTXRX, addr);
sp->psc_smbtxrx = addr; WR(adap, PSC_SMBPCR, PSC_SMBPCR_MS);
au_sync();
sp->psc_smbpcr = PSC_SMBPCR_MS;
au_sync();
if (wait_ack(adap)) if (wait_ack(adap))
return -EIO; return -EIO;
return (q) ? wait_master_done(adap) : 0; return (q) ? wait_master_done(adap) : 0;
} }
static u32 static int wait_for_rx_byte(struct i2c_au1550_data *adap, unsigned char *out)
wait_for_rx_byte(struct i2c_au1550_data *adap, u32 *ret_data)
{ {
int j; int j;
u32 data, stat;
volatile psc_smb_t *sp;
if (wait_xfer_done(adap)) if (wait_xfer_done(adap))
return -EIO; return -EIO;
sp = (volatile psc_smb_t *)(adap->psc_base);
j = adap->xfer_timeout * 100; j = adap->xfer_timeout * 100;
do { do {
j--; j--;
if (j <= 0) if (j <= 0)
return -EIO; return -EIO;
stat = sp->psc_smbstat; if ((RD(adap, PSC_SMBSTAT) & PSC_SMBSTAT_RE) == 0)
au_sync();
if ((stat & PSC_SMBSTAT_RE) == 0)
j = 0; j = 0;
else else
udelay(1); udelay(1);
} while (j > 0); } while (j > 0);
data = sp->psc_smbtxrx;
au_sync(); *out = RD(adap, PSC_SMBTXRX);
*ret_data = data;
return 0; return 0;
} }
static int static int i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
unsigned int len) unsigned int len)
{ {
int i; int i;
u32 data;
volatile psc_smb_t *sp;
if (len == 0) if (len == 0)
return 0; return 0;
@ -204,62 +180,46 @@ i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
* zero bytes for timing, waiting for bytes to appear in the * zero bytes for timing, waiting for bytes to appear in the
* receive fifo, then reading the bytes. * receive fifo, then reading the bytes.
*/ */
sp = (volatile psc_smb_t *)(adap->psc_base);
i = 0; i = 0;
while (i < (len-1)) { while (i < (len - 1)) {
sp->psc_smbtxrx = 0; WR(adap, PSC_SMBTXRX, 0);
au_sync(); if (wait_for_rx_byte(adap, &buf[i]))
if (wait_for_rx_byte(adap, &data))
return -EIO; return -EIO;
buf[i] = data;
i++; i++;
} }
/* The last byte has to indicate transfer done. /* The last byte has to indicate transfer done. */
*/ WR(adap, PSC_SMBTXRX, PSC_SMBTXRX_STP);
sp->psc_smbtxrx = PSC_SMBTXRX_STP;
au_sync();
if (wait_master_done(adap)) if (wait_master_done(adap))
return -EIO; return -EIO;
data = sp->psc_smbtxrx; buf[i] = (unsigned char)(RD(adap, PSC_SMBTXRX) & 0xff);
au_sync();
buf[i] = data;
return 0; return 0;
} }
static int static int i2c_write(struct i2c_au1550_data *adap, unsigned char *buf,
i2c_write(struct i2c_au1550_data *adap, unsigned char *buf,
unsigned int len) unsigned int len)
{ {
int i; int i;
u32 data; unsigned long data;
volatile psc_smb_t *sp;
if (len == 0) if (len == 0)
return 0; return 0;
sp = (volatile psc_smb_t *)(adap->psc_base);
i = 0; i = 0;
while (i < (len-1)) { while (i < (len-1)) {
data = buf[i]; data = buf[i];
sp->psc_smbtxrx = data; WR(adap, PSC_SMBTXRX, data);
au_sync();
if (wait_ack(adap)) if (wait_ack(adap))
return -EIO; return -EIO;
i++; i++;
} }
/* The last byte has to indicate transfer done. /* The last byte has to indicate transfer done. */
*/
data = buf[i]; data = buf[i];
data |= PSC_SMBTXRX_STP; data |= PSC_SMBTXRX_STP;
sp->psc_smbtxrx = data; WR(adap, PSC_SMBTXRX, data);
au_sync();
if (wait_master_done(adap)) if (wait_master_done(adap))
return -EIO; return -EIO;
return 0; return 0;
@ -269,12 +229,10 @@ static int
au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
{ {
struct i2c_au1550_data *adap = i2c_adap->algo_data; struct i2c_au1550_data *adap = i2c_adap->algo_data;
volatile psc_smb_t *sp = (volatile psc_smb_t *)adap->psc_base;
struct i2c_msg *p; struct i2c_msg *p;
int i, err = 0; int i, err = 0;
sp->psc_ctrl = PSC_CTRL_ENABLE; WR(adap, PSC_CTRL, PSC_CTRL_ENABLE);
au_sync();
for (i = 0; !err && i < num; i++) { for (i = 0; !err && i < num; i++) {
p = &msgs[i]; p = &msgs[i];
@ -293,14 +251,12 @@ au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
if (err == 0) if (err == 0)
err = num; err = num;
sp->psc_ctrl = PSC_CTRL_SUSPEND; WR(adap, PSC_CTRL, PSC_CTRL_SUSPEND);
au_sync();
return err; return err;
} }
static u32 static u32 au1550_func(struct i2c_adapter *adap)
au1550_func(struct i2c_adapter *adap)
{ {
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
} }
@ -312,57 +268,45 @@ static const struct i2c_algorithm au1550_algo = {
static void i2c_au1550_setup(struct i2c_au1550_data *priv) static void i2c_au1550_setup(struct i2c_au1550_data *priv)
{ {
volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base; unsigned long cfg;
u32 stat;
sp->psc_ctrl = PSC_CTRL_DISABLE; WR(priv, PSC_CTRL, PSC_CTRL_DISABLE);
au_sync(); WR(priv, PSC_SEL, PSC_SEL_PS_SMBUSMODE);
sp->psc_sel = PSC_SEL_PS_SMBUSMODE; WR(priv, PSC_SMBCFG, 0);
sp->psc_smbcfg = 0; WR(priv, PSC_CTRL, PSC_CTRL_ENABLE);
au_sync(); while ((RD(priv, PSC_SMBSTAT) & PSC_SMBSTAT_SR) == 0)
sp->psc_ctrl = PSC_CTRL_ENABLE; cpu_relax();
au_sync();
do {
stat = sp->psc_smbstat;
au_sync();
} while ((stat & PSC_SMBSTAT_SR) == 0);
sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | cfg = PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | PSC_SMBCFG_DD_DISABLE;
PSC_SMBCFG_DD_DISABLE); WR(priv, PSC_SMBCFG, cfg);
/* Divide by 8 to get a 6.25 MHz clock. The later protocol /* Divide by 8 to get a 6.25 MHz clock. The later protocol
* timings are based on this clock. * timings are based on this clock.
*/ */
sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); cfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8);
sp->psc_smbmsk = PSC_SMBMSK_ALLMASK; WR(priv, PSC_SMBCFG, cfg);
au_sync(); WR(priv, PSC_SMBMSK, PSC_SMBMSK_ALLMASK);
/* Set the protocol timer values. See Table 71 in the /* Set the protocol timer values. See Table 71 in the
* Au1550 Data Book for standard timing values. * Au1550 Data Book for standard timing values.
*/ */
sp->psc_smbtmr = PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ WR(priv, PSC_SMBTMR, PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \
PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \
PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \
PSC_SMBTMR_SET_CH(15); PSC_SMBTMR_SET_CH(15));
au_sync();
sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE; cfg |= PSC_SMBCFG_DE_ENABLE;
do { WR(priv, PSC_SMBCFG, cfg);
stat = sp->psc_smbstat; while ((RD(priv, PSC_SMBSTAT) & PSC_SMBSTAT_SR) == 0)
au_sync(); cpu_relax();
} while ((stat & PSC_SMBSTAT_SR) == 0);
sp->psc_ctrl = PSC_CTRL_SUSPEND; WR(priv, PSC_CTRL, PSC_CTRL_SUSPEND);
au_sync();
} }
static void i2c_au1550_disable(struct i2c_au1550_data *priv) static void i2c_au1550_disable(struct i2c_au1550_data *priv)
{ {
volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base; WR(priv, PSC_SMBCFG, 0);
WR(priv, PSC_CTRL, PSC_CTRL_DISABLE);
sp->psc_smbcfg = 0;
sp->psc_ctrl = PSC_CTRL_DISABLE;
au_sync();
} }
/* /*
@ -396,7 +340,11 @@ i2c_au1550_probe(struct platform_device *pdev)
goto out_mem; goto out_mem;
} }
priv->psc_base = CKSEG1ADDR(r->start); priv->psc_base = ioremap(r->start, resource_size(r));
if (!priv->psc_base) {
ret = -EIO;
goto out_map;
}
priv->xfer_timeout = 200; priv->xfer_timeout = 200;
priv->ack_timeout = 200; priv->ack_timeout = 200;
@ -406,8 +354,7 @@ i2c_au1550_probe(struct platform_device *pdev)
priv->adap.dev.parent = &pdev->dev; priv->adap.dev.parent = &pdev->dev;
strlcpy(priv->adap.name, "Au1xxx PSC I2C", sizeof(priv->adap.name)); strlcpy(priv->adap.name, "Au1xxx PSC I2C", sizeof(priv->adap.name));
/* Now, set up the PSC for SMBus PIO mode. /* Now, set up the PSC for SMBus PIO mode. */
*/
i2c_au1550_setup(priv); i2c_au1550_setup(priv);
ret = i2c_add_numbered_adapter(&priv->adap); ret = i2c_add_numbered_adapter(&priv->adap);
@ -417,7 +364,8 @@ i2c_au1550_probe(struct platform_device *pdev)
} }
i2c_au1550_disable(priv); i2c_au1550_disable(priv);
iounmap(priv->psc_base);
out_map:
release_resource(priv->ioarea); release_resource(priv->ioarea);
kfree(priv->ioarea); kfree(priv->ioarea);
out_mem: out_mem:
@ -426,14 +374,14 @@ out:
return ret; return ret;
} }
static int __devexit static int __devexit i2c_au1550_remove(struct platform_device *pdev)
i2c_au1550_remove(struct platform_device *pdev)
{ {
struct i2c_au1550_data *priv = platform_get_drvdata(pdev); struct i2c_au1550_data *priv = platform_get_drvdata(pdev);
platform_set_drvdata(pdev, NULL); platform_set_drvdata(pdev, NULL);
i2c_del_adapter(&priv->adap); i2c_del_adapter(&priv->adap);
i2c_au1550_disable(priv); i2c_au1550_disable(priv);
iounmap(priv->psc_base);
release_resource(priv->ioarea); release_resource(priv->ioarea);
kfree(priv->ioarea); kfree(priv->ioarea);
kfree(priv); kfree(priv);
@ -476,14 +424,12 @@ static struct platform_driver au1xpsc_smbus_driver = {
.resume = i2c_au1550_resume, .resume = i2c_au1550_resume,
}; };
static int __init static int __init i2c_au1550_init(void)
i2c_au1550_init(void)
{ {
return platform_driver_register(&au1xpsc_smbus_driver); return platform_driver_register(&au1xpsc_smbus_driver);
} }
static void __exit static void __exit i2c_au1550_exit(void)
i2c_au1550_exit(void)
{ {
platform_driver_unregister(&au1xpsc_smbus_driver); platform_driver_unregister(&au1xpsc_smbus_driver);
} }