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ARC updates for 4.15-rc1

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- More changes for HS48 cores: supporting MMUv5, detecting new micro-arch gizmos
 
  - axs10x platform wiring up reset driver merged in this cycle
 
  - ARC perf driver optimizations
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Merge tag 'arc-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull ARC updates from Vineet Gupta:

 - more changes for HS48 cores: supporting MMUv5, detecting new
   micro-arch gizmos

 - axs10x platform wiring up reset driver merged in this cycle

 - ARC perf driver optimizations

* tag 'arc-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
  ARC: perf: avoid vmalloc backed mmap
  ARCv2: perf: optimize given that num counters <= 32
  ARCv2: perf: tweak overflow interrupt
  ARC: [plat-axs10x] DTS: Add reset controller node to manage ethernet reset
  ARCv2: boot log: updates for HS48: dual-issue, ECC, Loop Buffer
  ARCv2: Accomodate HS48 MMUv5 by relaxing MMU ver checking
  ARC: [plat-axs10x] auto-select AXS101 or AXS103 given the  ISA config
This commit is contained in:
Linus Torvalds 2017-11-25 08:21:54 -10:00
commit ca122fe376
8 changed files with 135 additions and 55 deletions
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8
arch/arc/boot/dts/axs10x_mb.dtsi
View file

@ -16,6 +16,12 @@
ranges = <0x00000000 0x0 0xe0000000 0x10000000>;
interrupt-parent = <&mb_intc>;
creg_rst: reset-controller@11220 {
compatible = "snps,axs10x-reset";
#reset-cells = <1>;
reg = <0x11220 0x4>;
};
i2sclk: i2sclk@100a0 {
compatible = "snps,axs10x-i2s-pll-clock";
reg = <0x100a0 0x10>;
@ -73,6 +79,8 @@
clocks = <&apbclk>;
clock-names = "stmmaceth";
max-speed = <100>;
resets = <&creg_rst 5>;
reset-names = "stmmaceth";
};
ehci@0x40000 {