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drm/amdgpu: add amdgpu_vm_entries_mask v2
We can't get the mask for the root directory from the number of entries. So add a new function to avoid that problem. v2: fix typo in mask Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 27 additions and 7 deletions
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@ -190,6 +190,26 @@ static unsigned amdgpu_vm_num_entries(struct amdgpu_device *adev,
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return AMDGPU_VM_PTE_COUNT(adev);
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return AMDGPU_VM_PTE_COUNT(adev);
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}
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}
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/**
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* amdgpu_vm_entries_mask - the mask to get the entry number of a PD/PT
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*
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* @adev: amdgpu_device pointer
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* @level: VMPT level
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*
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* Returns:
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* The mask to extract the entry number of a PD/PT from an address.
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*/
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static uint32_t amdgpu_vm_entries_mask(struct amdgpu_device *adev,
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unsigned int level)
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{
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if (level <= adev->vm_manager.root_level)
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return 0xffffffff;
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else if (level != AMDGPU_VM_PTB)
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return 0x1ff;
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else
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return AMDGPU_VM_PTE_COUNT(adev) - 1;
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}
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/**
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/**
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* amdgpu_vm_bo_size - returns the size of the BOs in bytes
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* amdgpu_vm_bo_size - returns the size of the BOs in bytes
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*
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*
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@ -399,17 +419,17 @@ static void amdgpu_vm_pt_start(struct amdgpu_device *adev,
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static bool amdgpu_vm_pt_descendant(struct amdgpu_device *adev,
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static bool amdgpu_vm_pt_descendant(struct amdgpu_device *adev,
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struct amdgpu_vm_pt_cursor *cursor)
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struct amdgpu_vm_pt_cursor *cursor)
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{
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{
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unsigned num_entries, shift, idx;
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unsigned mask, shift, idx;
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if (!cursor->entry->entries)
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if (!cursor->entry->entries)
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return false;
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return false;
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BUG_ON(!cursor->entry->base.bo);
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BUG_ON(!cursor->entry->base.bo);
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num_entries = amdgpu_vm_num_entries(adev, cursor->level);
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mask = amdgpu_vm_entries_mask(adev, cursor->level);
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shift = amdgpu_vm_level_shift(adev, cursor->level);
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shift = amdgpu_vm_level_shift(adev, cursor->level);
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++cursor->level;
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++cursor->level;
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idx = (cursor->pfn >> shift) % num_entries;
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idx = (cursor->pfn >> shift) & mask;
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cursor->parent = cursor->entry;
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cursor->parent = cursor->entry;
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cursor->entry = &cursor->entry->entries[idx];
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cursor->entry = &cursor->entry->entries[idx];
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return true;
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return true;
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@ -1599,7 +1619,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
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amdgpu_vm_pt_start(adev, params->vm, start, &cursor);
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amdgpu_vm_pt_start(adev, params->vm, start, &cursor);
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while (cursor.pfn < end) {
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while (cursor.pfn < end) {
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struct amdgpu_bo *pt = cursor.entry->base.bo;
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struct amdgpu_bo *pt = cursor.entry->base.bo;
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unsigned shift, parent_shift, num_entries;
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unsigned shift, parent_shift, mask;
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uint64_t incr, entry_end, pe_start;
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uint64_t incr, entry_end, pe_start;
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if (!pt)
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if (!pt)
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@ -1654,9 +1674,9 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
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/* Looks good so far, calculate parameters for the update */
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/* Looks good so far, calculate parameters for the update */
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incr = AMDGPU_GPU_PAGE_SIZE << shift;
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incr = AMDGPU_GPU_PAGE_SIZE << shift;
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num_entries = amdgpu_vm_num_entries(adev, cursor.level);
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mask = amdgpu_vm_entries_mask(adev, cursor.level);
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pe_start = ((cursor.pfn >> shift) & (num_entries - 1)) * 8;
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pe_start = ((cursor.pfn >> shift) & mask) * 8;
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entry_end = num_entries << shift;
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entry_end = (mask + 1) << shift;
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entry_end += cursor.pfn & ~(entry_end - 1);
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entry_end += cursor.pfn & ~(entry_end - 1);
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entry_end = min(entry_end, end);
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entry_end = min(entry_end, end);
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