GitHub-Mirror/linux-bl808
2
0
Fork 0
mirror of https://github.com/Fishwaldo/linux-bl808.git synced 2025-06-14 10:34:54 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

drm/amd/display: Set mpcc_disconnect_pending during MPC reset

Browse source 
This prevents an issue where the MPCC will not go to idle due to us not
waiting for it to become idle during disable plane.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tony Cheng 2017-11-21 17:51:50 -05:00 • committed by Alex Deucher
parent 16a29dd3bb
commit cc55b1f5c3
2 changed files with 16 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

18
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
View file

@ -42,15 +42,25 @@ void hubp1_set_blank(struct hubp *hubp, bool blank)
{ {
struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp); struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
uint32_t blank_en = blank ? 1 : 0; uint32_t blank_en = blank ? 1 : 0;
uint32_t reg_val = 0;
REG_UPDATE_2(DCHUBP_CNTL, reg_val = REG_UPDATE_2(DCHUBP_CNTL,
HUBP_BLANK_EN, blank_en, HUBP_BLANK_EN, blank_en,
HUBP_TTU_DISABLE, blank_en); HUBP_TTU_DISABLE, blank_en);
if (blank) { if (blank) {
REG_WAIT(DCHUBP_CNTL, if (reg_val) {
HUBP_NO_OUTSTANDING_REQ, 1, /* init sequence workaround: in case HUBP is
1, 200); * power gated, this wait would timeout.
*
* we just wrote reg_val to non-0, if it stay 0
* it means HUBP is gated
*/
REG_WAIT(DCHUBP_CNTL,
HUBP_NO_OUTSTANDING_REQ, 1,
1, 200);
}
hubp->mpcc_id = 0xf; hubp->mpcc_id = 0xf;
hubp->opp_id = 0xf; hubp->opp_id = 0xf;
} }

4
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View file

@ -782,8 +782,8 @@ static void dcn10_init_hw(struct dc *dc)
hubp->opp_id = 0xf; hubp->opp_id = 0xf;
hubp->power_gated = false; hubp->power_gated = false;
if (hubp->opp_id != 0xf) dc->res_pool->opps[i]->mpcc_disconnect_pending[i] = true;
pipe_ctx->stream_res.opp = dc->res_pool->opps[hubp->opp_id]; pipe_ctx->stream_res.opp = dc->res_pool->opps[i];
plane_atomic_disconnect(dc, pipe_ctx); plane_atomic_disconnect(dc, pipe_ctx);
} }