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x86/mm: Prepare sme_encrypt_kernel() for PAGE aligned encryption
In preparation for encrypting more than just the kernel, the encryption support in sme_encrypt_kernel() needs to support 4KB page aligned encryption instead of just 2MB large page aligned encryption. Update the routines that populate the PGD to support non-2MB aligned addresses. This is done by creating PTE page tables for the start and end portion of the address range that fall outside of the 2MB alignment. This results in, at most, two extra pages to hold the PTE entries for each mapping of a range. Tested-by: Gabriel Craciunescu <nix.or.die@gmail.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Borislav Petkov <bp@suse.de> Cc: Borislav Petkov <bp@alien8.de> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20180110192626.6026.75387.stgit@tlendack-t1.amdoffice.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
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2 changed files with 121 additions and 22 deletions
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@ -104,6 +104,7 @@ ENTRY(__enc_copy)
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mov %rdx, %cr4
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push %r15
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push %r12
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movq %rcx, %r9 /* Save kernel length */
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movq %rdi, %r10 /* Save encrypted kernel address */
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@ -119,21 +120,27 @@ ENTRY(__enc_copy)
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wbinvd /* Invalidate any cache entries */
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/* Copy/encrypt 2MB at a time */
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/* Copy/encrypt up to 2MB at a time */
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movq $PMD_PAGE_SIZE, %r12
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1:
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cmpq %r12, %r9
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jnb 2f
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movq %r9, %r12
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2:
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movq %r11, %rsi /* Source - decrypted kernel */
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movq %r8, %rdi /* Dest - intermediate copy buffer */
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movq $PMD_PAGE_SIZE, %rcx /* 2MB length */
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movq %r12, %rcx
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rep movsb
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movq %r8, %rsi /* Source - intermediate copy buffer */
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movq %r10, %rdi /* Dest - encrypted kernel */
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movq $PMD_PAGE_SIZE, %rcx /* 2MB length */
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movq %r12, %rcx
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rep movsb
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addq $PMD_PAGE_SIZE, %r11
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addq $PMD_PAGE_SIZE, %r10
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subq $PMD_PAGE_SIZE, %r9 /* Kernel length decrement */
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addq %r12, %r11
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addq %r12, %r10
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subq %r12, %r9 /* Kernel length decrement */
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jnz 1b /* Kernel length not zero? */
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/* Restore PAT register */
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@ -142,6 +149,7 @@ ENTRY(__enc_copy)
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mov %r15, %rdx /* Restore original PAT value */
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wrmsr
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pop %r12
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pop %r15
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ret
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