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https://github.com/Fishwaldo/linux-bl808.git
synced 2025-03-15 11:34:41 +00:00
IPC Mailbox Changes
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parent
7c892825e7
commit
e17d63c2b6
4 changed files with 135 additions and 13 deletions
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@ -18,7 +18,7 @@
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chosen {
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stdout-path = "serial0:2000000n8";
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bootargs = "console=ttyS0,2000000 loglevel=8 earlycon=sbi root=/dev/mmcblk0p2 rootwait rootfstype=ext4";
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bootargs = "console=ttyS0,2000000 loglevel=8 earlycon=sbi root=/dev/mmcblk0p2 rootwait rootfstype=ext4 dyndbg=\"file drivers/remoteproc/* +p; file drivers/rpmsg/* +p; file drivers/virtio/* +p; file drivers/mailbox/* +p;\"";
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linux,initrd-start = <0x0 0x52000000>;
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linux,initrd-end = <0x0 0x52941784>;
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};
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@ -28,6 +28,7 @@
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reg = <0x50000000 0x04000000>;
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};
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xip_flash@58500000 {
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compatible = "mtd-rom";
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reg = <0x58500000 0x400000>;
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@ -53,6 +54,7 @@
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status = "okay";
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};
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&enet0 {
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&rproc {
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status = "okay";
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};
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@ -59,6 +59,31 @@
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#clock-cells = <0>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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/* putting this at the top of uncached WRAM for the moment */
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vdev0vring0: vdev0vring0@22054000 {
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compatible = "shared-dma-pool";
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reg = <0x22050000 0x4000>;
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no-map;
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};
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vdev0vring1: vdev0vring1@22055000 {
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compatible = "shared-dma-pool";
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reg = <0x22054000 0x4000>;
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no-map;
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};
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vdev0buffer: vdev0buffer@22056000 {
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compatible = "shared-dma-pool";
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reg = <0x22042000 0x8000>;
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no-map;
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};
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};
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soc {
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compatible = "simple-bus";
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ranges;
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@ -140,5 +165,22 @@
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#interrupt-cells = <2>;
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riscv,ndev = <64>;
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};
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clint: timer@e4000000 {
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compatible = "thead,c900-clint";
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reg = <0xe4000000 0xc000>;
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interrupts-extended = <&cpu0_intc 3>,
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<&cpu0_intc 7>;
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};
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rproc: rproc@22054000 {
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compatible = "bflb,bl808-rproc";
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reg = <0x22054000 0x4000>;
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memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>;
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mboxes = <&ipclic BFLB_IPC_TARGET_M0 BFLB_IPC_MBOX_VIRTIO_KICK>;
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status = "disabled";
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};
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};
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};
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@ -64,6 +64,7 @@ static inline u32 bflb_ipc_get_hwirq(u16 source, u16 device)
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{
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pr_debug("%s: source: %u, device: %u\n", __func__, source, device);
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return device;
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}
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@ -72,7 +73,7 @@ static void bflb_ipc_dump_regs(struct bflb_ipc *ipc)
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{
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int i;
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for (i=0; i<4; i++) {
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dev_dbg(ipc->dev, "base %px\n", ipc->base[i]);
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dev_dbg(ipc->dev, "base %px %d\n", ipc->base[i], i);
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dev_dbg(ipc->dev, "ISWR: 0x%08x\n", readl(ipc->base[i] + IPC_REG_ISWR));
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dev_dbg(ipc->dev, "IRSRR: 0x%08x\n", readl(ipc->base[i] + IPC_REG_IRSRR));
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dev_dbg(ipc->dev, "ICR: 0x%08x\n", readl(ipc->base[i] + IPC_REG_ICR));
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@ -85,6 +86,30 @@ static void bflb_ipc_dump_regs(struct bflb_ipc *ipc)
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}
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#endif
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/* check the High/Low registers for the MBOX and send it off to
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* the mailbox.
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* JH: I'm guessing Source should map to the mailbox? But I've only allocated a single
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* mailbox so far, so its discarded.
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*/
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static void bflb_mbox_poll(struct bflb_ipc *ipc)
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{
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u32 signal = readl(ipc->base[1] + IPC_REG_ILSHR);
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u32 source = readl(ipc->base[1] + IPC_REG_ILSLR);
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dev_dbg(ipc->dev, "signal: 0x%08x, source: 0x%08x\r\n", signal, source);
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mbox_chan_received_data(&ipc->chans[0], signal);
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/* clear the IPC_REG_ILSLR and IPC_REG_ILSHR */
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writel(0, ipc->base[1] + IPC_REG_ILSLR);
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writel(0, ipc->base[1] + IPC_REG_ILSHR);
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return;
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}
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static irqreturn_t bflb_ipc_irq_fn(int irq, void *data)
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{
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struct bflb_ipc *ipc = data;
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@ -92,12 +117,22 @@ static irqreturn_t bflb_ipc_irq_fn(int irq, void *data)
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int pos;
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stat = readl(ipc->base[1] + IPC_REG_ISR);
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for_each_set_bit(pos, &stat, 32)
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generic_handle_domain_irq(ipc->irq_domain, pos);
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/*JH: I'm guessing there is a better way to pull out the mailbox IPC from others ?*/
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for_each_set_bit(pos, &stat, 32) {
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if (pos == BFLB_IPC_DEVICE_MBOX)
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bflb_mbox_poll(ipc);
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else
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generic_handle_domain_irq(ipc->irq_domain, pos);
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}
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writel(stat, ipc->base[1] + IPC_REG_ICR);
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/* EOI the irqs */
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writel(stat, ipc->base[2] + IPC_REG_ISWR);
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/* EOI the irqs except our MBOX */
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/* JH: I don't EOI the mailbox, I just look to see if the High/Low registers are cleared on M0 side */
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if (stat != (1 << BFLB_IPC_DEVICE_MBOX))
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writel(stat, ipc->base[2] + IPC_REG_ISWR);
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return IRQ_HANDLED;
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}
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@ -157,17 +192,42 @@ static const struct irq_domain_ops bflb_ipc_irq_ops = {
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.xlate = bflb_ipc_domain_xlate,
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};
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/* JH: Figure out if M0 has processed the last signal sent
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* by checking if the High/Low registers are cleared
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*/
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static int bflb_ipc_mbox_can_send(struct mbox_chan *chan)
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{
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struct bflb_ipc *ipc = to_bflb_ipc(chan->mbox);
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u32 mbox_high = readl(ipc->base[2] + IPC_REG_ILSHR);
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u32 mbox_low = readl(ipc->base[2] + IPC_REG_ILSLR);
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dev_dbg(ipc->dev, "%s: low: 0x%08x high: 0x%08x\r\n", __func__, mbox_low, mbox_high);
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return !(mbox_low | mbox_high);
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}
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static int bflb_ipc_mbox_send_data(struct mbox_chan *chan, void *data)
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{
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struct bflb_ipc *ipc = to_bflb_ipc(chan->mbox);
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struct bflb_ipc_chan_info *mchan = chan->con_priv;
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u32 hwirq;
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hwirq = bflb_ipc_get_hwirq(mchan->client_id, mchan->signal_id);
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if (!bflb_ipc_mbox_can_send(chan))
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return -EBUSY;
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dev_dbg(ipc->dev, "%s: hwirq: %u\n", __func__, hwirq);
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// writel(hwirq, ipc->base + IPC_REG_SEND_ID);
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dev_dbg(ipc->dev, "%s: %d %d\n", __func__, mchan->client_id, mchan->signal_id);
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// /* write our signal number to high register */
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writel(mchan->signal_id, ipc->base[2] + IPC_REG_ILSHR);
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// /* write our data to low register */
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writel((u32)data, ipc->base[2] + IPC_REG_ILSLR);
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/* and now kick the remote processor */
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writel((1 << BFLB_IPC_DEVICE_MBOX), ipc->base[2] + IPC_REG_ISWR);
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return 0;
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}
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@ -219,6 +279,7 @@ static struct mbox_chan *bflb_ipc_mbox_xlate(struct mbox_controller *mbox,
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return chan;
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}
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static const struct mbox_chan_ops ipc_mbox_chan_ops = {
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.send_data = bflb_ipc_mbox_send_data,
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.shutdown = bflb_ipc_mbox_shutdown,
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@ -236,6 +297,7 @@ static int bflb_ipc_setup_mbox(struct bflb_ipc *ipc,
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/*
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* Find out the number of clients interested in this mailbox
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* and create channels accordingly.
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* JH: How do we allocate them so we can lookup by name?
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*/
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ipc->num_chans = 0;
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for_each_node_with_property(client_dn, "mboxes") {
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@ -253,7 +315,7 @@ static int bflb_ipc_setup_mbox(struct bflb_ipc *ipc,
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}
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}
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}
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dev_dbg(dev, "%s: num_chans: %d", __func__, ipc->num_chans);
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/* If no clients are found, skip registering as a mbox controller */
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if (!ipc->num_chans)
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return 0;
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@ -272,6 +334,14 @@ static int bflb_ipc_setup_mbox(struct bflb_ipc *ipc,
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mbox->txdone_irq = false;
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mbox->txdone_poll = false;
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/* clear the IPC_REG_ILSLR and IPC_REG_ILSHR */
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writel(0, ipc->base[2] + IPC_REG_ILSLR);
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writel(0, ipc->base[2] + IPC_REG_ILSHR);
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/* unmask our interupt */
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writel(BIT(BFLB_IPC_DEVICE_MBOX), ipc->base[1] + IPC_REG_IUSR);
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return devm_mbox_controller_register(dev, mbox);
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}
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@ -13,7 +13,15 @@
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/* Peripheral device ID */
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#define BFLB_IPC_DEVICE_SDHCI 0
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#define BFLB_IPC_DEVICE_UART2 1
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#define BFLB_IPC_DEVICE_USB 2
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#define BFLB_IPC_DEVICE_USB 2
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#define BFLB_IPC_DEVICE_EMAC 3
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#define BFLB_IPC_DEVICE_MBOX 5
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#define BFLB_IPC_TARGET_M0 0
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#define BFLB_IPC_TARGET_LP 1
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/* MailBox Signals */
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#define BFLB_IPC_MBOX_VIRTIO_KICK 1
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#endif
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