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vfio: powerpc/spapr: Support Dynamic DMA windows
This adds create/remove window ioctls to create and remove DMA windows. sPAPR defines a Dynamic DMA windows capability which allows para-virtualized guests to create additional DMA windows on a PCI bus. The existing linux kernels use this new window to map the entire guest memory and switch to the direct DMA operations saving time on map/unmap requests which would normally happen in a big amounts. This adds 2 ioctl handlers - VFIO_IOMMU_SPAPR_TCE_CREATE and VFIO_IOMMU_SPAPR_TCE_REMOVE - to create and remove windows. Up to 2 windows are supported now by the hardware and by this driver. This changes VFIO_IOMMU_SPAPR_TCE_GET_INFO handler to return additional information such as a number of supported windows and maximum number levels of TCE tables. DDW is added as a capability, not as a SPAPR TCE IOMMU v2 unique feature as we still want to support v2 on platforms which cannot do DDW for the sake of TCE acceleration in KVM (coming soon). Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [aw: for the vfio related changes] Acked-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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4 changed files with 273 additions and 5 deletions
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@ -444,6 +444,23 @@ struct vfio_iommu_type1_dma_unmap {
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/* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */
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/*
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* The SPAPR TCE DDW info struct provides the information about
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* the details of Dynamic DMA window capability.
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*
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* @pgsizes contains a page size bitmask, 4K/64K/16M are supported.
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* @max_dynamic_windows_supported tells the maximum number of windows
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* which the platform can create.
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* @levels tells the maximum number of levels in multi-level IOMMU tables;
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* this allows splitting a table into smaller chunks which reduces
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* the amount of physically contiguous memory required for the table.
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*/
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struct vfio_iommu_spapr_tce_ddw_info {
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__u64 pgsizes; /* Bitmap of supported page sizes */
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__u32 max_dynamic_windows_supported;
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__u32 levels;
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};
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/*
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* The SPAPR TCE info struct provides the information about the PCI bus
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* address ranges available for DMA, these values are programmed into
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@ -454,14 +471,17 @@ struct vfio_iommu_type1_dma_unmap {
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* addresses too so the window works as a filter rather than an offset
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* for IOVA addresses.
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*
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* A flag will need to be added if other page sizes are supported,
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* so as defined here, it is always 4k.
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* Flags supported:
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* - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows
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* (DDW) support is present. @ddw is only supported when DDW is present.
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*/
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struct vfio_iommu_spapr_tce_info {
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__u32 argsz;
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__u32 flags; /* reserved for future use */
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__u32 flags;
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#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) /* DDW supported */
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__u32 dma32_window_start; /* 32 bit window start (bytes) */
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__u32 dma32_window_size; /* 32 bit window size (bytes) */
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struct vfio_iommu_spapr_tce_ddw_info ddw;
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};
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#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
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@ -534,6 +554,41 @@ struct vfio_iommu_spapr_register_memory {
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*/
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#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18)
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/**
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* VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create)
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*
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* Creates an additional TCE table and programs it (sets a new DMA window)
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* to every IOMMU group in the container. It receives page shift, window
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* size and number of levels in the TCE table being created.
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*
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* It allocates and returns an offset on a PCI bus of the new DMA window.
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*/
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struct vfio_iommu_spapr_tce_create {
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__u32 argsz;
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__u32 flags;
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/* in */
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__u32 page_shift;
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__u64 window_size;
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__u32 levels;
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/* out */
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__u64 start_addr;
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};
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#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19)
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/**
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* VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove)
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*
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* Unprograms a TCE table from all groups in the container and destroys it.
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* It receives a PCI bus offset as a window id.
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*/
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struct vfio_iommu_spapr_tce_remove {
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__u32 argsz;
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__u32 flags;
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/* in */
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__u64 start_addr;
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};
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#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20)
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/* ***************************************************************** */
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#endif /* _UAPIVFIO_H */
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