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perf_events: Update Intel extra regs shared constraints management
This patch improves the code managing the extra shared registers used for offcore_response events on Intel Nehalem/Westmere. The idea is to use static allocation instead of dynamic allocation. This simplifies greatly the get and put constraint routines for those events. The patch also renames per_core to shared_regs because the same data structure gets used whether or not HT is on. When HT is off, those events still need to coordination because they use a extra MSR that has to be shared within an event group. Signed-off-by: Stephane Eranian <eranian@google.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/20110606145703.GA7258@quad Signed-off-by: Ingo Molnar <mingo@elte.hu>
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3 changed files with 201 additions and 153 deletions
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@ -536,6 +536,16 @@ struct perf_branch_stack {
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struct task_struct;
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/*
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* extra PMU register associated with an event
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*/
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struct hw_perf_event_extra {
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u64 config; /* register value */
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unsigned int reg; /* register address or index */
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int alloc; /* extra register already allocated */
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int idx; /* index in shared_regs->regs[] */
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};
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/**
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* struct hw_perf_event - performance event hardware details:
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*/
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@ -549,9 +559,7 @@ struct hw_perf_event {
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unsigned long event_base;
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int idx;
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int last_cpu;
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unsigned int extra_reg;
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u64 extra_config;
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int extra_alloc;
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struct hw_perf_event_extra extra_reg;
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};
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struct { /* software */
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struct hrtimer hrtimer;
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