3 commits

Author	SHA1	Message	Date
Christian König	4fef88bd00	drm/amdgpu: implement gmc_v6_0_emit_flush_gpu_tlb ... Unify tlb flushing for gmc v6. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2018-02-19 14:18:08 -05:00
Alex Deucher	a125510721	drm/amdgpu: rework IP block registration (v2) ... This makes it easier to replace specific IP blocks on asics for handling virtual_dce, DAL, etc. and for building IP lists for hw or tables. This also stored the status information in the same structure. v2: split out spelling fix into a separate patch add a function to add IPs to the list Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2016-10-25 14:38:45 -04:00
Ken Wang	62a3755341	drm/amdgpu: add si implementation v10 ... v5: rebase fixes v6: add mgcg arrays v7: rebase fixes v8: rebase fixes v9: add get_disabled_bios(), make get_xclk static v10: fix oland and hainan asic specific handle at si_program_aspm Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2016-08-31 12:11:19 -04:00