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Author SHA1 Message Date
Moritz Fischer
bb9cac24d7 ARM: zynq: PM: Fixed simple typo. 
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2015-01-29 15:38:09 +01:00
Soren Brinkmann
0beb2bd36f ARM: zynq: PM: Enable DDR clock stop 
The DDR controller can detect idle periods and leverage low power
features clock stop. When new requests occur, the DDRC resumes
normal operation.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2014-09-16 12:55:07 +02:00