2 commits

Author	SHA1	Message	Date
Peter Rosin	02f513a097	pm: at91: Workaround DDRSDRC self-refresh bug with LPDDR1 memories. ... The DDRSDR controller fails miserably to put LPDDR1 memories in self-refresh. Force the controller to think it has DDR2 memories during the self-refresh period, as the DDR2 self-refresh spec is equivalent to LPDDR1, and is correctly implemented in the controller. Assume that the second controller has the same fault, but that is untested. Signed-off-by: Peter Rosin <peda@axentia.se> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>	2015-03-03 19:43:59 +01:00
Alexandre Belloni	f0a0a58e6f	ARM: at91: move sdramc/ddrsdr header to include/soc/at91 ... Move the (DDR) SDRAM controller headers to include/soc/at91 to remove the dependency on mach/ headers from the at91-reset driver. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>	2014-11-13 12:03:44 +01:00

Renamed from arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h (Browse further)