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https://github.com/Fishwaldo/linux-bl808.git
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abfabc9b48
Driver rtlwifi fails on a big-endian host. These changes have been tested on a Mac PowerBook G4, which has a PPC processor. Although this patch touches some of the code that will affect endian issues on PCI hardware through drivers rtl8192ce, rtl8192se, and rtl8192de, these have not been tested due to lack of suitable hardware. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
99 lines
3.3 KiB
C
99 lines
3.3 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2009-2010 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __RTL92C__FW__COMMON__H__
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#define __RTL92C__FW__COMMON__H__
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#define FW_8192C_SIZE 0x3000
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#define FW_8192C_START_ADDRESS 0x1000
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#define FW_8192C_END_ADDRESS 0x1FFF
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#define FW_8192C_PAGE_SIZE 4096
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#define FW_8192C_POLLING_DELAY 5
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#define FW_8192C_POLLING_TIMEOUT_COUNT 100
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#define IS_FW_HEADER_EXIST(_pfwhdr) \
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((le16_to_cpu(_pfwhdr->signature)&0xFFF0) == 0x92C0 ||\
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(le16_to_cpu(_pfwhdr->signature)&0xFFF0) == 0x88C0)
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struct rtl92c_firmware_header {
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__le16 signature;
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u8 category;
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u8 function;
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__le16 version;
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u8 subversion;
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u8 rsvd1;
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u8 month;
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u8 date;
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u8 hour;
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u8 minute;
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__le16 ramcodeSize;
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__le16 rsvd2;
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__le32 svnindex;
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__le32 rsvd3;
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__le32 rsvd4;
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__le32 rsvd5;
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};
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enum rtl8192c_h2c_cmd {
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H2C_AP_OFFLOAD = 0,
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H2C_SETPWRMODE = 1,
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H2C_JOINBSSRPT = 2,
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H2C_RSVDPAGE = 3,
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H2C_RSSI_REPORT = 5,
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H2C_RA_MASK = 6,
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MAX_H2CCMD
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};
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#define pagenum_128(_len) (u32)(((_len)>>7) + ((_len)&0x7F ? 1 : 0))
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#define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
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#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
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#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
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#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
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int rtl92c_download_fw(struct ieee80211_hw *hw);
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void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
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u32 cmd_len, u8 *p_cmdbuffer);
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void rtl92c_firmware_selfreset(struct ieee80211_hw *hw);
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void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
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void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
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void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
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void usb_writeN_async(struct rtl_priv *rtlpriv, u32 addr, void *data, u16 len);
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#endif
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