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The prescaler value is arbitrarily set to 1024 without any regard to the timer frequency. For 32-bit timers, there is no need to set a prescaler value as they wrap in an acceptable interval and give the opportunity to have precise timers on this platform. However, for 16-bit timers a prescaler value is needed if we don't want to wrap too often per second which is inefficient and adds more and more error margin. With a targeted clock of 10MHz, the 16 bits are precise enough whatever the timer frequency is as we will compute the prescaler. Tested-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Benjamin Gaignard <benjamin.gaignard@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1515418139-23276-15-git-send-email-daniel.lezcano@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
180 lines
4.6 KiB
C
180 lines
4.6 KiB
C
/*
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* Copyright (C) Maxime Coquelin 2015
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* Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
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* License terms: GNU General Public License (GPL), version 2
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*
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* Inspired by time-efm32.c from Uwe Kleine-Koenig
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*/
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#include <linux/kernel.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/clk.h>
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#include <linux/reset.h>
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#include <linux/slab.h>
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#include "timer-of.h"
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#define TIM_CR1 0x00
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#define TIM_DIER 0x0c
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#define TIM_SR 0x10
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#define TIM_EGR 0x14
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#define TIM_PSC 0x28
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#define TIM_ARR 0x2c
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#define TIM_CR1_CEN BIT(0)
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#define TIM_CR1_OPM BIT(3)
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#define TIM_CR1_ARPE BIT(7)
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#define TIM_DIER_UIE BIT(0)
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#define TIM_SR_UIF BIT(0)
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#define TIM_EGR_UG BIT(0)
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#define TIM_PSC_MAX USHRT_MAX
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#define TIM_PSC_CLKRATE 10000
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static int stm32_clock_event_shutdown(struct clock_event_device *clkevt)
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{
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struct timer_of *to = to_timer_of(clkevt);
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writel_relaxed(0, timer_of_base(to) + TIM_CR1);
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return 0;
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}
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static int stm32_clock_event_set_periodic(struct clock_event_device *clkevt)
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{
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struct timer_of *to = to_timer_of(clkevt);
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writel_relaxed(timer_of_period(to), timer_of_base(to) + TIM_ARR);
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writel_relaxed(TIM_CR1_ARPE | TIM_CR1_CEN, timer_of_base(to) + TIM_CR1);
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return 0;
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}
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static int stm32_clock_event_set_next_event(unsigned long evt,
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struct clock_event_device *clkevt)
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{
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struct timer_of *to = to_timer_of(clkevt);
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writel_relaxed(evt, timer_of_base(to) + TIM_ARR);
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writel_relaxed(TIM_CR1_ARPE | TIM_CR1_OPM | TIM_CR1_CEN,
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timer_of_base(to) + TIM_CR1);
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return 0;
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}
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static irqreturn_t stm32_clock_event_handler(int irq, void *dev_id)
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{
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struct clock_event_device *clkevt = (struct clock_event_device *)dev_id;
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struct timer_of *to = to_timer_of(clkevt);
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writel_relaxed(0, timer_of_base(to) + TIM_SR);
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clkevt->event_handler(clkevt);
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return IRQ_HANDLED;
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}
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/**
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* stm32_timer_width - Sort out the timer width (32/16)
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* @to: a pointer to a timer-of structure
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*
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* Write the 32-bit max value and read/return the result. If the timer
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* is 32 bits wide, the result will be UINT_MAX, otherwise it will
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* be truncated by the 16-bit register to USHRT_MAX.
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*
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* Returns UINT_MAX if the timer is 32 bits wide, USHRT_MAX if it is a
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* 16 bits wide.
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*/
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static u32 __init stm32_timer_width(struct timer_of *to)
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{
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writel_relaxed(UINT_MAX, timer_of_base(to) + TIM_ARR);
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return readl_relaxed(timer_of_base(to) + TIM_ARR);
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}
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static void __init stm32_clockevent_init(struct timer_of *to)
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{
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u32 width = 0;
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int prescaler;
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to->clkevt.name = to->np->full_name;
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to->clkevt.features = CLOCK_EVT_FEAT_PERIODIC;
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to->clkevt.set_state_shutdown = stm32_clock_event_shutdown;
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to->clkevt.set_state_periodic = stm32_clock_event_set_periodic;
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to->clkevt.set_state_oneshot = stm32_clock_event_shutdown;
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to->clkevt.tick_resume = stm32_clock_event_shutdown;
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to->clkevt.set_next_event = stm32_clock_event_set_next_event;
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width = stm32_timer_width(to);
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if (width == UINT_MAX) {
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prescaler = 1;
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to->clkevt.rating = 250;
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} else {
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prescaler = DIV_ROUND_CLOSEST(timer_of_rate(to),
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TIM_PSC_CLKRATE);
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/*
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* The prescaler register is an u16, the variable
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* can't be greater than TIM_PSC_MAX, let's cap it in
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* this case.
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*/
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prescaler = prescaler < TIM_PSC_MAX ? prescaler : TIM_PSC_MAX;
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to->clkevt.rating = 100;
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}
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writel_relaxed(0, timer_of_base(to) + TIM_ARR);
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writel_relaxed(prescaler - 1, timer_of_base(to) + TIM_PSC);
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writel_relaxed(TIM_EGR_UG, timer_of_base(to) + TIM_EGR);
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writel_relaxed(0, timer_of_base(to) + TIM_SR);
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writel_relaxed(TIM_DIER_UIE, timer_of_base(to) + TIM_DIER);
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/* Adjust rate and period given the prescaler value */
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to->of_clk.rate = DIV_ROUND_CLOSEST(to->of_clk.rate, prescaler);
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to->of_clk.period = DIV_ROUND_UP(to->of_clk.rate, HZ);
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clockevents_config_and_register(&to->clkevt,
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timer_of_rate(to), 0x1, width);
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pr_info("%pOF: STM32 clockevent driver initialized (%d bits)\n",
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to->np, width == UINT_MAX ? 32 : 16);
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}
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static int __init stm32_timer_init(struct device_node *node)
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{
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struct reset_control *rstc;
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struct timer_of *to;
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int ret;
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to = kzalloc(sizeof(*to), GFP_KERNEL);
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if (!to)
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return -ENOMEM;
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to->flags = TIMER_OF_IRQ | TIMER_OF_CLOCK | TIMER_OF_BASE;
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to->of_irq.handler = stm32_clock_event_handler;
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ret = timer_of_init(node, to);
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if (ret)
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goto err;
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rstc = of_reset_control_get(node, NULL);
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if (!IS_ERR(rstc)) {
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reset_control_assert(rstc);
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reset_control_deassert(rstc);
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}
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stm32_clockevent_init(to);
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return 0;
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err:
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kfree(to);
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return ret;
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}
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TIMER_OF_DECLARE(stm32, "st,stm32-timer", stm32_timer_init);
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