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The NXP SJA1105 DSA switch integrates a Synopsys SGMII XPCS on port 4. The generic code works fine, except there is an integration issue which needs to be dealt with: in this switch, the XPCS is integrated with a PMA that has the TX lane polarity inverted by default (PLUS is MINUS, MINUS is PLUS). To obtain normal non-inverted behavior, the TX lane polarity must be inverted in the PCS, via the DIGITAL_CONTROL_2 register. We introduce a pma_config() method in xpcs_compat which is called by the phylink_pcs_config() implementation. Also, the NXP SJA1105 returns all zeroes in the PHY ID registers 2 and 3. We need to hack up an ad-hoc PHY ID (OUI is zero, device ID is 1) in order for the XPCS driver to recognize it. This PHY ID is added to the public include/linux/pcs/pcs-xpcs.h for that reason (for the sja1105 driver to be able to use it in a later patch). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
37 lines
926 B
C
37 lines
926 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2020 Synopsys, Inc. and/or its affiliates.
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* Synopsys DesignWare XPCS helpers
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*/
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#ifndef __LINUX_PCS_XPCS_H
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#define __LINUX_PCS_XPCS_H
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#include <linux/phy.h>
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#include <linux/phylink.h>
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#define NXP_SJA1105_XPCS_ID 0x00000010
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/* AN mode */
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#define DW_AN_C73 1
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#define DW_AN_C37_SGMII 2
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#define DW_2500BASEX 3
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struct xpcs_id;
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struct dw_xpcs {
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struct mdio_device *mdiodev;
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const struct xpcs_id *id;
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struct phylink_pcs pcs;
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};
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int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface);
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void xpcs_validate(struct dw_xpcs *xpcs, unsigned long *supported,
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struct phylink_link_state *state);
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int xpcs_config_eee(struct dw_xpcs *xpcs, int mult_fact_100ns,
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int enable);
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struct dw_xpcs *xpcs_create(struct mdio_device *mdiodev,
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phy_interface_t interface);
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void xpcs_destroy(struct dw_xpcs *xpcs);
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#endif /* __LINUX_PCS_XPCS_H */
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