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The one obvious thing SH and ARM want is a sensible default for tlb_start_vma(). (also: https://lkml.org/lkml/2004/1/15/6 ) Avoid all VIPT architectures providing their own tlb_start_vma() implementation and rely on architectures to provide a no-op flush_cache_range() when it is not relevant. This patch makes tlb_start_vma() default to flush_cache_range(), which should be right and sufficient. The only exceptions that I found where (oddly): - m68k-mmu - sparc64 - unicore Those architectures appear to have flush_cache_range(), but their current tlb_start_vma() does not call it. No change in behavior intended. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David Miller <davem@davemloft.net> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Nick Piggin <npiggin@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org>
34 lines
838 B
C
34 lines
838 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_TLB_H
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#define __ASM_TLB_H
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#include <asm/cpu-features.h>
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#include <asm/mipsregs.h>
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#define tlb_end_vma(tlb, vma) do { } while (0)
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#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
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/*
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* .. because we flush the whole mm when it fills up.
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*/
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#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
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#define _UNIQUE_ENTRYHI(base, idx) \
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(((base) + ((idx) << (PAGE_SHIFT + 1))) | \
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(cpu_has_tlbinv ? MIPS_ENTRYHI_EHINV : 0))
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#define UNIQUE_ENTRYHI(idx) _UNIQUE_ENTRYHI(CKSEG0, idx)
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#define UNIQUE_GUEST_ENTRYHI(idx) _UNIQUE_ENTRYHI(CKSEG1, idx)
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static inline unsigned int num_wired_entries(void)
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{
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unsigned int wired = read_c0_wired();
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if (cpu_has_mips_r6)
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wired &= MIPSR6_WIRED_WIRED;
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return wired;
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}
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#include <asm-generic/tlb.h>
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#endif /* __ASM_TLB_H */
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