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opensbi: Remove obsolete nezha-d1 patches for opensbi
Due to wrong machine value, the patches were not applied anymore. Moreover, opensbi 1.1 works with nezsha D1 without changes.
This commit is contained in:
Andreas Cord-Landwehr
Khem Raj
parent
d88ad1c1ba
commit
224eba4646
3 changed files with 0 additions and 223 deletions
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@ -1,66 +0,0 @@
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From 65410b015fc16d1c47b1972f89a35f5c8dd10abe Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Tue, 19 Oct 2021 19:25:37 -0500
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Subject: [PATCH 1/2] lib: utils/fdt: Require match data to be const
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Match data stores hardware attributes which do not change at runtime, so
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it does not need to be mutable. Make it const.
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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include/sbi_utils/fdt/fdt_helper.h | 2 +-
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lib/utils/ipi/fdt_ipi_mswi.c | 2 +-
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lib/utils/reset/fdt_reset_gpio.c | 4 ++--
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3 files changed, 4 insertions(+), 4 deletions(-)
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diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
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index 24fee7a339c3..fde00b72fc1d 100644
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--- a/include/sbi_utils/fdt/fdt_helper.h
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+++ b/include/sbi_utils/fdt/fdt_helper.h
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@@ -15,7 +15,7 @@
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struct fdt_match {
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const char *compatible;
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- void *data;
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+ const void *data;
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};
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#define FDT_MAX_PHANDLE_ARGS 16
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diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
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index 1f0fda71c087..0176941a7d68 100644
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--- a/lib/utils/ipi/fdt_ipi_mswi.c
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+++ b/lib/utils/ipi/fdt_ipi_mswi.c
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@@ -51,7 +51,7 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
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return 0;
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}
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-static unsigned long clint_offset = CLINT_MSWI_OFFSET;
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+static const unsigned long clint_offset = CLINT_MSWI_OFFSET;
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static const struct fdt_match ipi_mswi_match[] = {
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{ .compatible = "riscv,clint0", .data = &clint_offset },
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diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
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index d28b6f5ba958..bd2c62270645 100644
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--- a/lib/utils/reset/fdt_reset_gpio.c
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+++ b/lib/utils/reset/fdt_reset_gpio.c
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@@ -149,7 +149,7 @@ static int gpio_reset_init(void *fdt, int nodeoff,
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}
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static const struct fdt_match gpio_poweroff_match[] = {
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- { .compatible = "gpio-poweroff", .data = (void *)FALSE },
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+ { .compatible = "gpio-poweroff", .data = (const void *)FALSE },
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{ },
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};
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@@ -159,7 +159,7 @@ struct fdt_reset fdt_poweroff_gpio = {
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};
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static const struct fdt_match gpio_reset_match[] = {
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- { .compatible = "gpio-restart", .data = (void *)TRUE },
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+ { .compatible = "gpio-restart", .data = (const void *)TRUE },
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{ },
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};
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--
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2.25.1
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@ -1,146 +0,0 @@
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From c9024b561c01aa469bed3c2266d78e6ae76882ff Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 8 Aug 2021 01:18:44 -0500
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Subject: [PATCH 2/2] lib: utils/timer: Add a separate compatible for the D1
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CLINT
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The CLINT in the Allwinner D1 SoC apparently does not support 64-bit
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MMIO access. A property was added to support this quirk (and that
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property was copied to the ACLINT MTIMER code). However, since this
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difference in behavior makes the D1 CLINT incompatible with the SiFive
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CLINT's programming interface, a better solution is to use a separate
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compatible string.
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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docs/platform/thead-c9xx.md | 4 +--
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lib/utils/ipi/fdt_ipi_mswi.c | 1 +
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lib/utils/timer/fdt_timer_mtimer.c | 39 +++++++++++++++++++-----------
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3 files changed, 27 insertions(+), 17 deletions(-)
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diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md
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index 3490ed50dc88..ced784d13f74 100644
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--- a/docs/platform/thead-c9xx.md
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+++ b/docs/platform/thead-c9xx.md
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@@ -52,12 +52,11 @@ DTS Example1: (Single core, eg: Allwinner D1 - c906)
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ranges;
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clint0: clint@14000000 {
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- compatible = "riscv,clint0";
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+ compatible = "allwinner,sun20i-d1-clint";
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interrupts-extended = <
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&cpu0_intc 3 &cpu0_intc 7
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>;
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reg = <0x0 0x14000000 0x0 0x04000000>;
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- clint,has-no-64bit-mmio;
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};
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intc: interrupt-controller@10000000 {
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@@ -163,7 +162,6 @@ DTS Example2: (Multi cores with soc reset-regs)
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&cpu4_intc 3 &cpu4_intc 7
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>;
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reg = <0xff 0xdc000000 0x0 0x04000000>;
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- clint,has-no-64bit-mmio;
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};
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intc: interrupt-controller@ffd8000000 {
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diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
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index 0176941a7d68..af69e161a8b7 100644
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--- a/lib/utils/ipi/fdt_ipi_mswi.c
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+++ b/lib/utils/ipi/fdt_ipi_mswi.c
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@@ -54,6 +54,7 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
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static const unsigned long clint_offset = CLINT_MSWI_OFFSET;
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static const struct fdt_match ipi_mswi_match[] = {
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+ { .compatible = "allwinner,sun20i-d1-clint", .data = &clint_offset },
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{ .compatible = "riscv,clint0", .data = &clint_offset },
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{ .compatible = "sifive,clint0", .data = &clint_offset },
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{ .compatible = "riscv,aclint-mswi" },
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diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
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index 1ad8508f7a02..e140567e9c76 100644
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--- a/lib/utils/timer/fdt_timer_mtimer.c
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+++ b/lib/utils/timer/fdt_timer_mtimer.c
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@@ -15,6 +15,11 @@
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#define MTIMER_MAX_NR 16
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+struct timer_mtimer_quirks {
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+ unsigned int mtime_offset;
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+ bool has_64bit_mmio;
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+};
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+
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static unsigned long mtimer_count = 0;
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static struct aclint_mtimer_data mtimer[MTIMER_MAX_NR];
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static struct aclint_mtimer_data *mt_reference = NULL;
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@@ -23,7 +28,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
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const struct fdt_match *match)
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{
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int i, rc;
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- unsigned long offset, addr[2], size[2];
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+ unsigned long addr[2], size[2];
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struct aclint_mtimer_data *mt;
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if (MTIMER_MAX_NR <= mtimer_count)
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@@ -43,28 +48,25 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
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return rc;
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if (match->data) { /* SiFive CLINT */
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+ const struct timer_mtimer_quirks *quirks = match->data;
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+
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/* Set CLINT addresses */
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mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
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mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;
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mt->mtime_addr = addr[0] + ACLINT_DEFAULT_MTIME_OFFSET;
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mt->mtime_size = size[0] - mt->mtimecmp_size;
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/* Adjust MTIMER address and size for CLINT device */
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- offset = *((unsigned long *)match->data);
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- mt->mtime_addr += offset;
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- mt->mtimecmp_addr += offset;
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- mt->mtime_size -= offset;
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- /* Parse additional CLINT properties */
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- if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc))
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- mt->has_64bit_mmio = false;
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+ mt->mtime_addr += quirks->mtime_offset;
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+ mt->mtimecmp_addr += quirks->mtime_offset;
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+ mt->mtime_size -= quirks->mtime_offset;
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+ /* Apply additional CLINT quirks */
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+ mt->has_64bit_mmio = quirks->has_64bit_mmio;
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} else { /* RISC-V ACLINT MTIMER */
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/* Set ACLINT MTIMER addresses */
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mt->mtime_addr = addr[0];
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mt->mtime_size = size[0];
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mt->mtimecmp_addr = addr[1];
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mt->mtimecmp_size = size[1];
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- /* Parse additional ACLINT MTIMER properties */
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- if (fdt_getprop(fdt, nodeoff, "mtimer,no-64bit-mmio", &rc))
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- mt->has_64bit_mmio = false;
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}
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/* Check if MTIMER device has shared MTIME address */
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@@ -107,11 +109,20 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
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return 0;
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}
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-static unsigned long clint_offset = CLINT_MTIMER_OFFSET;
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+static const struct timer_mtimer_quirks d1_clint_quirks = {
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+ .mtime_offset = CLINT_MTIMER_OFFSET,
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+ .has_64bit_mmio = false,
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+};
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+
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+static const struct timer_mtimer_quirks sifive_clint_quirks = {
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+ .mtime_offset = CLINT_MTIMER_OFFSET,
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+ .has_64bit_mmio = true,
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+};
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static const struct fdt_match timer_mtimer_match[] = {
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- { .compatible = "riscv,clint0", .data = &clint_offset },
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- { .compatible = "sifive,clint0", .data = &clint_offset },
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+ { .compatible = "allwinner,sun20i-d1-clint", .data = &d1_clint_quirks },
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+ { .compatible = "riscv,clint0", .data = &sifive_clint_quirks },
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+ { .compatible = "sifive,clint0", .data = &sifive_clint_quirks },
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{ .compatible = "riscv,aclint-mtimer" },
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{ },
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};
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--
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2.25.1
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@ -1,13 +1,2 @@
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# Mainline OpenSBI supports the C906 out of the box, but it needs a few tweaks
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# and a new reset driver for the sunxi watchdog.
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FILESEXTRAPATHS:prepend:nezha := "${THISDIR}/files:"
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SRC_URI:append:nezha = " \
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file://0001-lib-utils-fdt-Require-match-data-to-be-const.patch \
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file://0002-lib-utils-timer-Add-a-separate-compatible-for-the-D1.patch \
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"
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INSANE_SKIP:${PN}:nezha += "ldflags"
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# Support fdt drivers for AE350
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SRCREV:ae350-ax45mp = "22f38ee6c658a660083aa45c4ec6c72f66a17260"
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