opensbi: Remove obsolete nezha-d1 patches for opensbi

Due to wrong machine value, the patches were not applied anymore.
Moreover, opensbi 1.1 works with nezsha D1 without changes.
This commit is contained in:
Andreas Cord-Landwehr 2022-12-23 12:57:25 +01:00 committed by Khem Raj
parent d88ad1c1ba
commit 224eba4646
3 changed files with 0 additions and 223 deletions

View file

@ -1,66 +0,0 @@
From 65410b015fc16d1c47b1972f89a35f5c8dd10abe Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Tue, 19 Oct 2021 19:25:37 -0500
Subject: [PATCH 1/2] lib: utils/fdt: Require match data to be const
Match data stores hardware attributes which do not change at runtime, so
it does not need to be mutable. Make it const.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
include/sbi_utils/fdt/fdt_helper.h | 2 +-
lib/utils/ipi/fdt_ipi_mswi.c | 2 +-
lib/utils/reset/fdt_reset_gpio.c | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 24fee7a339c3..fde00b72fc1d 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -15,7 +15,7 @@
struct fdt_match {
const char *compatible;
- void *data;
+ const void *data;
};
#define FDT_MAX_PHANDLE_ARGS 16
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index 1f0fda71c087..0176941a7d68 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -51,7 +51,7 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
return 0;
}
-static unsigned long clint_offset = CLINT_MSWI_OFFSET;
+static const unsigned long clint_offset = CLINT_MSWI_OFFSET;
static const struct fdt_match ipi_mswi_match[] = {
{ .compatible = "riscv,clint0", .data = &clint_offset },
diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index d28b6f5ba958..bd2c62270645 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -149,7 +149,7 @@ static int gpio_reset_init(void *fdt, int nodeoff,
}
static const struct fdt_match gpio_poweroff_match[] = {
- { .compatible = "gpio-poweroff", .data = (void *)FALSE },
+ { .compatible = "gpio-poweroff", .data = (const void *)FALSE },
{ },
};
@@ -159,7 +159,7 @@ struct fdt_reset fdt_poweroff_gpio = {
};
static const struct fdt_match gpio_reset_match[] = {
- { .compatible = "gpio-restart", .data = (void *)TRUE },
+ { .compatible = "gpio-restart", .data = (const void *)TRUE },
{ },
};
--
2.25.1

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@ -1,146 +0,0 @@
From c9024b561c01aa469bed3c2266d78e6ae76882ff Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 8 Aug 2021 01:18:44 -0500
Subject: [PATCH 2/2] lib: utils/timer: Add a separate compatible for the D1
CLINT
The CLINT in the Allwinner D1 SoC apparently does not support 64-bit
MMIO access. A property was added to support this quirk (and that
property was copied to the ACLINT MTIMER code). However, since this
difference in behavior makes the D1 CLINT incompatible with the SiFive
CLINT's programming interface, a better solution is to use a separate
compatible string.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
docs/platform/thead-c9xx.md | 4 +--
lib/utils/ipi/fdt_ipi_mswi.c | 1 +
lib/utils/timer/fdt_timer_mtimer.c | 39 +++++++++++++++++++-----------
3 files changed, 27 insertions(+), 17 deletions(-)
diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md
index 3490ed50dc88..ced784d13f74 100644
--- a/docs/platform/thead-c9xx.md
+++ b/docs/platform/thead-c9xx.md
@@ -52,12 +52,11 @@ DTS Example1: (Single core, eg: Allwinner D1 - c906)
ranges;
clint0: clint@14000000 {
- compatible = "riscv,clint0";
+ compatible = "allwinner,sun20i-d1-clint";
interrupts-extended = <
&cpu0_intc 3 &cpu0_intc 7
>;
reg = <0x0 0x14000000 0x0 0x04000000>;
- clint,has-no-64bit-mmio;
};
intc: interrupt-controller@10000000 {
@@ -163,7 +162,6 @@ DTS Example2: (Multi cores with soc reset-regs)
&cpu4_intc 3 &cpu4_intc 7
>;
reg = <0xff 0xdc000000 0x0 0x04000000>;
- clint,has-no-64bit-mmio;
};
intc: interrupt-controller@ffd8000000 {
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index 0176941a7d68..af69e161a8b7 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -54,6 +54,7 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
static const unsigned long clint_offset = CLINT_MSWI_OFFSET;
static const struct fdt_match ipi_mswi_match[] = {
+ { .compatible = "allwinner,sun20i-d1-clint", .data = &clint_offset },
{ .compatible = "riscv,clint0", .data = &clint_offset },
{ .compatible = "sifive,clint0", .data = &clint_offset },
{ .compatible = "riscv,aclint-mswi" },
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 1ad8508f7a02..e140567e9c76 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -15,6 +15,11 @@
#define MTIMER_MAX_NR 16
+struct timer_mtimer_quirks {
+ unsigned int mtime_offset;
+ bool has_64bit_mmio;
+};
+
static unsigned long mtimer_count = 0;
static struct aclint_mtimer_data mtimer[MTIMER_MAX_NR];
static struct aclint_mtimer_data *mt_reference = NULL;
@@ -23,7 +28,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
const struct fdt_match *match)
{
int i, rc;
- unsigned long offset, addr[2], size[2];
+ unsigned long addr[2], size[2];
struct aclint_mtimer_data *mt;
if (MTIMER_MAX_NR <= mtimer_count)
@@ -43,28 +48,25 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
return rc;
if (match->data) { /* SiFive CLINT */
+ const struct timer_mtimer_quirks *quirks = match->data;
+
/* Set CLINT addresses */
mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;
mt->mtime_addr = addr[0] + ACLINT_DEFAULT_MTIME_OFFSET;
mt->mtime_size = size[0] - mt->mtimecmp_size;
/* Adjust MTIMER address and size for CLINT device */
- offset = *((unsigned long *)match->data);
- mt->mtime_addr += offset;
- mt->mtimecmp_addr += offset;
- mt->mtime_size -= offset;
- /* Parse additional CLINT properties */
- if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc))
- mt->has_64bit_mmio = false;
+ mt->mtime_addr += quirks->mtime_offset;
+ mt->mtimecmp_addr += quirks->mtime_offset;
+ mt->mtime_size -= quirks->mtime_offset;
+ /* Apply additional CLINT quirks */
+ mt->has_64bit_mmio = quirks->has_64bit_mmio;
} else { /* RISC-V ACLINT MTIMER */
/* Set ACLINT MTIMER addresses */
mt->mtime_addr = addr[0];
mt->mtime_size = size[0];
mt->mtimecmp_addr = addr[1];
mt->mtimecmp_size = size[1];
- /* Parse additional ACLINT MTIMER properties */
- if (fdt_getprop(fdt, nodeoff, "mtimer,no-64bit-mmio", &rc))
- mt->has_64bit_mmio = false;
}
/* Check if MTIMER device has shared MTIME address */
@@ -107,11 +109,20 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
return 0;
}
-static unsigned long clint_offset = CLINT_MTIMER_OFFSET;
+static const struct timer_mtimer_quirks d1_clint_quirks = {
+ .mtime_offset = CLINT_MTIMER_OFFSET,
+ .has_64bit_mmio = false,
+};
+
+static const struct timer_mtimer_quirks sifive_clint_quirks = {
+ .mtime_offset = CLINT_MTIMER_OFFSET,
+ .has_64bit_mmio = true,
+};
static const struct fdt_match timer_mtimer_match[] = {
- { .compatible = "riscv,clint0", .data = &clint_offset },
- { .compatible = "sifive,clint0", .data = &clint_offset },
+ { .compatible = "allwinner,sun20i-d1-clint", .data = &d1_clint_quirks },
+ { .compatible = "riscv,clint0", .data = &sifive_clint_quirks },
+ { .compatible = "sifive,clint0", .data = &sifive_clint_quirks },
{ .compatible = "riscv,aclint-mtimer" },
{ },
};
--
2.25.1

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@ -1,13 +1,2 @@
# Mainline OpenSBI supports the C906 out of the box, but it needs a few tweaks
# and a new reset driver for the sunxi watchdog.
FILESEXTRAPATHS:prepend:nezha := "${THISDIR}/files:"
SRC_URI:append:nezha = " \
file://0001-lib-utils-fdt-Require-match-data-to-be-const.patch \
file://0002-lib-utils-timer-Add-a-separate-compatible-for-the-D1.patch \
"
INSANE_SKIP:${PN}:nezha += "ldflags"
# Support fdt drivers for AE350
SRCREV:ae350-ax45mp = "22f38ee6c658a660083aa45c4ec6c72f66a17260"