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glibc: Update the 32-bit glibc fork

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Update the glibc fork to the latest submission.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Alistair Francis 2019-02-05 10:42:20 -08:00 • committed by Khem Raj
parent 10fe1ad628
commit 47b2303211
2 changed files with 3 additions and 44 deletions
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26
recipes-core/glibc/files/0001-riscv-Fix-dl-cache-array-bounds.patch
View file

@ -1,26 +0,0 @@
From a23eb7becd5b6ecb09ed3f0f35a0441f43bd4aa1 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Wed, 28 Nov 2018 12:47:07 -0800
Subject: [PATCH] riscv: Fix dl-cache array bounds
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
sysdeps/unix/sysv/linux/riscv/dl-cache.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sysdeps/unix/sysv/linux/riscv/dl-cache.h b/sysdeps/unix/sysv/linux/riscv/dl-cache.h
index f3a999ac86..e44d882e8c 100644
--- a/sysdeps/unix/sysv/linux/riscv/dl-cache.h
+++ b/sysdeps/unix/sysv/linux/riscv/dl-cache.h
@@ -51,7 +51,7 @@
do \
{ \
size_t len = strlen (dir); \
- char path[len + 9]; \
+ char path[len + 10]; \
memcpy (path, dir, len + 1); \
if (len >= 13 && ! memcmp(path + len - 13, "/lib32/ilp32d", 13)) \
{ \
--
2.19.1

21
recipes-core/glibc/glibc_%.bbappend
View file

@ -1,21 +1,6 @@
# Upstream Glibc does not yet have RISC-V 32-bit support
# This is the most recent port sent to the glibc mailing list
GLIBC_GIT_URI_qemuriscv32 = "git://github.com/zongbox/riscv-glibc.git"
SRCBRANCH_qemuriscv32 = "riscv32-submission-v4-rebase-v5"
SRCREV_qemuriscv32 = "858a04037082f99ac74766df696f6a7c9c986ada"
SRC_URI_remove_qemuriscv32 = " \
file://0011-eglibc-run-libm-err-tab.pl-with-specific-dirs-in-S.patch \
file://0028-bits-siginfo-consts.h-enum-definition-for-TRAP_HWBKP.patch \
file://0031-sysdeps-ieee754-prevent-maybe-uninitialized-errors-w.patch \
file://0032-sysdeps-ieee754-soft-fp-ignore-maybe-uninitialized-w.patch \
file://0032-sysdeps-ieee754-soft-fp-ignore-maybe-uninitialized-w.patch \
file://0033-locale-prevent-maybe-uninitialized-errors-with-Os-BZ.patch \
"
FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
SRC_URI_append_qemuriscv32 = "\
file://0001-riscv-Fix-dl-cache-array-bounds.patch \
"
GLIBC_GIT_URI_qemuriscv32 = "git://github.com/riscv/riscv-glibc.git"
SRCBRANCH_qemuriscv32 = "riscv-glibc-2.29"
SRCREV_qemuriscv32 = "04fdd476160a55792a75375ba2bf56c761f811c2"