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firmware: Reset all registers and flush icache
A warm reset using reset button may put icache and registers in non-coherent state. Flush the icache and reset all registers for every hart. Signed-off-by: Atish Patra <atish.patra@wdc.com>
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@ -25,6 +25,8 @@ _start:
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csrr a6, CSR_MHARTID
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blt zero, a6, _wait_for_boot_hart
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li ra, 0
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call _reset_regs
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/* Zero-out BSS */
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la a4, _bss_start
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la a5, _bss_end
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@ -392,6 +394,8 @@ _trap_handler_all_mode:
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.globl _reset_regs
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_reset_regs:
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/* flush the instruction cache */
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fence.i
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/* Reset all registers except ra, a0,a1 */
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li sp, 0
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li gp, 0
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