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platform: andes: Factor out is_andes() helper
We will need is_andes(45) in the following patch, so factor out the code that parses marchid to make it reusable for checking any Andes CPU variants. Also improves the comment in ae350_hart_start(). Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
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0b3262efc6
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2 changed files with 13 additions and 9 deletions
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@ -24,16 +24,14 @@ static struct smu_data smu = { 0 };
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extern void __ae350_enable_coherency_warmboot(void);
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extern void __ae350_enable_coherency_warmboot(void);
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extern void __ae350_disable_coherency(void);
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extern void __ae350_disable_coherency(void);
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static __always_inline bool is_andes25(void)
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{
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ulong marchid = csr_read(CSR_MARCHID);
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return !!(EXTRACT_FIELD(marchid, CSR_MARCHID_MICROID) == 0xa25);
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}
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static int ae350_hart_start(u32 hartid, ulong saddr)
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static int ae350_hart_start(u32 hartid, ulong saddr)
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{
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{
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/* Don't send wakeup command at boot-time */
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/*
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if (!sbi_init_count(hartid) || (is_andes25() && hartid == 0))
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* Don't send wakeup command when:
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* 1) boot-time
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* 2) the target hart is non-sleepable 25-series hart0
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*/
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if (!sbi_init_count(hartid) || (is_andes(25) && hartid == 0))
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return sbi_ipi_raw_send(sbi_hartid_to_hartindex(hartid));
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return sbi_ipi_raw_send(sbi_hartid_to_hartindex(hartid));
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/* Write wakeup command to the sleep hart */
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/* Write wakeup command to the sleep hart */
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@ -52,7 +50,7 @@ static int ae350_hart_stop(void)
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* L2-cache, instead of turning it off, it should fall
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* L2-cache, instead of turning it off, it should fall
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* through and jump to warmboot_addr.
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* through and jump to warmboot_addr.
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*/
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*/
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if (is_andes25() && hartid == 0)
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if (is_andes(25) && hartid == 0)
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return SBI_ENOTSUPP;
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return SBI_ENOTSUPP;
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if (!smu_support_sleep_mode(&smu, DEEPSLEEP_MODE, hartid))
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if (!smu_support_sleep_mode(&smu, DEEPSLEEP_MODE, hartid))
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@ -43,6 +43,12 @@
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#ifndef __ASSEMBLER__
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#ifndef __ASSEMBLER__
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#define is_andes(series) \
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({ \
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char value = csr_read(CSR_MARCHID) & 0xff; \
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(series) == (value >> 4) * 10 + (value & 0x0f); \
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})
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#define has_andes_pmu() \
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#define has_andes_pmu() \
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({ \
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({ \
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(((csr_read(CSR_MMSC_CFG) & \
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(((csr_read(CSR_MMSC_CFG) & \
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