From 05602e2bf4812533adcb7acb1a67e43726c0e7bb Mon Sep 17 00:00:00 2001 From: Xiang Wang Date: Mon, 4 Mar 2019 17:22:37 +0800 Subject: [PATCH] firmware: Add a barrier instruction for wait for boot hart Multi-core communication via memory requires the addition of a barrier instructions to ensure cache coherency. Signed-off-by: Xiang Wang --- firmware/fw_base.S | 1 + 1 file changed, 1 insertion(+) diff --git a/firmware/fw_base.S b/firmware/fw_base.S index b28cfb5..ae14cc7 100644 --- a/firmware/fw_base.S +++ b/firmware/fw_base.S @@ -114,6 +114,7 @@ _fdt_reloc_done: /* Wait for boot hart */ _wait_for_boot_hart: + fence rw, rw la a4, _boot_hart_done REG_L a5, (a4) beqz a5, _wait_for_boot_hart