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platform: sifive/fu540: Remove FU540_ENABLED_HART_MASK option

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The FU540_ENABLED_HART_MASK compile time option was added for initial
bring-up on SiFive Unleashed. This option is redundant now because
disabled_hart_mask is already removed. Based on this rationale, we
remove FU540_ENABLED_HART_MASK compile time option.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Anup Patel 2020-03-16 10:29:34 +05:30 • committed by Anup Patel
parent c51f02cf14
commit 315a87710f
3 changed files with 2 additions and 23 deletions
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12
docs/platform/sifive_fu540.md
View file

@ -13,16 +13,8 @@ To build platform specific library and firmwares, provide the
Platform Options
----------------
As hart0 in the FU540 doesn't have an MMU, only harts 1-4 boot by default.
A hart mask i.e. *FU540_ENABLED_HART_MASK* compile time option is provided
to select any other hart for booting. Please keep in mind that this is not
a generic option and it can only be specified for FU540 platform in the
following way:
```
make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=Image FU540_ENABLED_HART_MASK=0x02
```
This will let the board boot only hart1 instead of default 1-4.
The *SiFive FU540 SoC* platform does not have any platform-specific
options.
Building SiFive Fu540 Platform
------------------------------

3
platform/sifive/fu540/objects.mk
View file

@ -8,6 +8,3 @@
#
platform-objs-y += platform.o
ifdef FU540_ENABLED_HART_MASK
platform-genflags-y += -DFU540_ENABLED_HART_MASK=$(FU540_ENABLED_HART_MASK)
endif

10
platform/sifive/fu540/platform.c
View file

@ -35,16 +35,6 @@
#define FU540_UART1_ADDR 0x10011000
#define FU540_UART_BAUDRATE 115200
/**
* The FU540 SoC has 5 HARTs but HART ID 0 doesn't have S mode. enable only
* HARTs 1 to 4.
*/
#ifndef FU540_ENABLED_HART_MASK
#define FU540_ENABLED_HART_MASK (1 << 1 | 1 << 2 | 1 << 3 | 1 << 4)
#endif
#define FU540_HARITD_DISABLED ~(FU540_ENABLED_HART_MASK)
/* PRCI clock related macros */
//TODO: Do we need a separate driver for this ?
#define FU540_PRCI_BASE_ADDR 0x10000000