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lib: utils: Allow PLIC functions to be used for multiple PLICs

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We extend all PLIC functions to have a "struct plic_data *"
parameter pointing to PLIC details. This allows platforms to
use these functions for multiple PLIC instances.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Anup Patel 2020-05-12 12:57:52 +05:30 • committed by Anup Patel
parent 73d6ef3b29
commit 446a9c6d1e
12 changed files with 127 additions and 82 deletions
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13
include/sbi_utils/fdt/fdt_helper.h
View file

@ -25,11 +25,6 @@ struct platform_uart_data {
unsigned long reg_io_width;
};
struct platform_plic_data {
unsigned long addr;
unsigned long num_src;
};
const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
const struct fdt_match *match_table);
@ -52,11 +47,11 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
const char *compatible);
int fdt_parse_plic_node(void *fdt, int nodeoffset,
struct platform_plic_data *plic);
struct plic_data;
int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
const char *compatible);
int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic);
int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat);
int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
const char *compatible);

14
include/sbi_utils/irqchip/plic.h
View file

@ -12,12 +12,18 @@
#include <sbi/sbi_types.h>
int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id);
struct plic_data {
unsigned long addr;
unsigned long num_src;
};
int plic_cold_irqchip_init(unsigned long base, u32 num_sources);
int plic_warm_irqchip_init(struct plic_data *plic,
int m_cntx_id, int s_cntx_id);
void plic_set_thresh(u32 cntxid, u32 val);
int plic_cold_irqchip_init(struct plic_data *plic);
void plic_set_ie(u32 cntxid, u32 word_index, u32 val);
void plic_set_thresh(struct plic_data *plic, u32 cntxid, u32 val);
void plic_set_ie(struct plic_data *plic, u32 cntxid, u32 word_index, u32 val);
#endif

11
lib/utils/fdt/fdt_helper.c
View file

@ -12,6 +12,7 @@
#include <sbi/sbi_platform.h>
#include <sbi/sbi_scratch.h>
#include <sbi_utils/fdt/fdt_helper.h>
#include <sbi_utils/irqchip/plic.h>
#define DEFAULT_UART_FREQ 0
#define DEFAULT_UART_BAUD 115200
@ -259,8 +260,7 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
return fdt_parse_uart8250_node(fdt, nodeoffset, uart);
}
int fdt_parse_plic_node(void *fdt, int nodeoffset,
struct platform_plic_data *plic)
int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
{
int len, rc;
const fdt32_t *val;
@ -281,15 +281,14 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset,
return 0;
}
int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
const char *compatible)
int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat)
{
int nodeoffset;
if (!compatible || !plic || !fdt)
if (!compat || !plic || !fdt)
return SBI_ENODEV;
nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compat);
if (nodeoffset < 0)
return nodeoffset;

6
lib/utils/irqchip/fdt_irqchip_plic.c
View file

@ -15,13 +15,14 @@
#include <sbi_utils/irqchip/fdt_irqchip.h>
#include <sbi_utils/irqchip/plic.h>
static struct plic_data plic;
static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2];
static int irqchip_plic_warm_init(void)
{
u32 hartid = current_hartid();
return plic_warm_irqchip_init(plic_hartid2context[hartid][0],
return plic_warm_irqchip_init(&plic, plic_hartid2context[hartid][0],
plic_hartid2context[hartid][1]);
}
@ -77,13 +78,12 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
const struct fdt_match *match)
{
int rc;
struct platform_plic_data plic;
rc = fdt_parse_plic_node(fdt, nodeoff, &plic);
if (rc)
return rc;
rc = plic_cold_irqchip_init(plic.addr, plic.num_src);
rc = plic_cold_irqchip_init(&plic);
if (rc)
return rc;

60
lib/utils/irqchip/plic.c
View file

@ -10,6 +10,7 @@
#include <sbi/riscv_io.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_console.h>
#include <sbi/sbi_error.h>
#include <sbi/sbi_string.h>
#include <sbi_utils/irqchip/plic.h>
@ -20,67 +21,80 @@
#define PLIC_CONTEXT_BASE 0x200000
#define PLIC_CONTEXT_STRIDE 0x1000
static u32 plic_num_sources;
static volatile void *plic_base;
static void plic_set_priority(u32 source, u32 val)
static void plic_set_priority(struct plic_data *plic, u32 source, u32 val)
{
volatile void *plic_priority =
plic_base + PLIC_PRIORITY_BASE + 4 * source;
volatile void *plic_priority = (void *)plic->addr +
PLIC_PRIORITY_BASE + 4 * source;
writel(val, plic_priority);
}
void plic_set_thresh(u32 cntxid, u32 val)
void plic_set_thresh(struct plic_data *plic, u32 cntxid, u32 val)
{
volatile void *plic_thresh =
plic_base + PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
volatile void *plic_thresh;
if (!plic)
return;
plic_thresh = (void *)plic->addr +
PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
writel(val, plic_thresh);
}
void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
void plic_set_ie(struct plic_data *plic, u32 cntxid, u32 word_index, u32 val)
{
volatile void *plic_ie =
plic_base + PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;
volatile void *plic_ie;
if (!plic)
return;
plic_ie = (void *)plic->addr +
PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;
writel(val, plic_ie + word_index * 4);
}
int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
int plic_warm_irqchip_init(struct plic_data *plic,
int m_cntx_id, int s_cntx_id)
{
size_t i, ie_words = plic_num_sources / 32 + 1;
size_t i, ie_words;
if (!plic)
return SBI_EINVAL;
ie_words = plic->num_src / 32 + 1;
/* By default, disable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(m_cntx_id, i, 0);
plic_set_ie(plic, m_cntx_id, i, 0);
}
/* By default, disable all IRQs for S-mode of target HART */
if (s_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(s_cntx_id, i, 0);
plic_set_ie(plic, s_cntx_id, i, 0);
}
/* By default, disable M-mode threshold */
if (m_cntx_id > -1)
plic_set_thresh(m_cntx_id, 0x7);
plic_set_thresh(plic, m_cntx_id, 0x7);
/* By default, disable S-mode threshold */
if (s_cntx_id > -1)
plic_set_thresh(s_cntx_id, 0x7);
plic_set_thresh(plic, s_cntx_id, 0x7);
return 0;
}
int plic_cold_irqchip_init(unsigned long base, u32 num_sources)
int plic_cold_irqchip_init(struct plic_data *plic)
{
int i;
plic_num_sources = num_sources;
plic_base = (void *)base;
if (!plic)
return SBI_EINVAL;
/* Configure default priorities of all IRQs */
for (i = 1; i <= plic_num_sources; i++)
plic_set_priority(i, 0);
for (i = 1; i <= plic->num_src; i++)
plic_set_priority(plic, i, 0);
return 0;
}

10
platform/andes/ae350/platform.c
View file

@ -20,6 +20,11 @@
#include "plicsw.h"
#include "plmt.h"
static struct plic_data plic = {
.addr = AE350_PLIC_ADDR,
.num_src = AE350_PLIC_NUM_SOURCES,
};
/* Platform final initialization. */
static int ae350_final_init(bool cold_boot)
{
@ -70,13 +75,12 @@ static int ae350_irqchip_init(bool cold_boot)
int ret;
if (cold_boot) {
ret = plic_cold_irqchip_init(AE350_PLIC_ADDR,
AE350_PLIC_NUM_SOURCES);
ret = plic_cold_irqchip_init(&plic);
if (ret)
return ret;
}
return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
}
/* Initialize IPI for current HART. */

16
platform/fpga/ariane/platform.c
View file

@ -26,6 +26,11 @@
#define ARIANE_HART_COUNT 1
#define ARIANE_CLINT_ADDR 0x2000000
static struct plic_data plic = {
.addr = ARIANE_PLIC_ADDR,
.num_src = ARIANE_PLIC_NUM_SOURCES,
};
/*
* Ariane platform early initialization.
*/
@ -70,19 +75,19 @@ static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
/* By default, enable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(m_cntx_id, i, 1);
plic_set_ie(&plic, m_cntx_id, i, 1);
}
/* Enable all IRQs for S-mode of target HART */
if (s_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(s_cntx_id, i, 1);
plic_set_ie(&plic, s_cntx_id, i, 1);
}
/* By default, enable M-mode threshold */
if (m_cntx_id > -1)
plic_set_thresh(m_cntx_id, 1);
plic_set_thresh(&plic, m_cntx_id, 1);
/* By default, disable S-mode threshold */
if (s_cntx_id > -1)
plic_set_thresh(s_cntx_id, 0);
plic_set_thresh(&plic, s_cntx_id, 0);
return 0;
}
@ -96,8 +101,7 @@ static int ariane_irqchip_init(bool cold_boot)
int ret;
if (cold_boot) {
ret = plic_cold_irqchip_init(ARIANE_PLIC_NUM_SOURCES,
ARIANE_HART_COUNT);
ret = plic_cold_irqchip_init(&plic);
if (ret)
return ret;
}

29
platform/fpga/openpiton/platform.c
View file

@ -27,14 +27,14 @@
#define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000
static struct platform_uart_data uart = {
OPENPITON_DEFAULT_UART_ADDR,
OPENPITON_DEFAULT_UART_FREQ,
OPENPITON_DEFAULT_UART_BAUDRATE,
};
static struct platform_plic_data plic = {
OPENPITON_DEFAULT_PLIC_ADDR,
OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
};
OPENPITON_DEFAULT_UART_ADDR,
OPENPITON_DEFAULT_UART_FREQ,
OPENPITON_DEFAULT_UART_BAUDRATE,
};
static struct plic_data plic = {
.addr = OPENPITON_DEFAULT_PLIC_ADDR,
.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
};
static unsigned long clint_addr = OPENPITON_DEFAULT_CLINT_ADDR;
/*
@ -44,7 +44,7 @@ static int openpiton_early_init(bool cold_boot)
{
void *fdt;
struct platform_uart_data uart_data;
struct platform_plic_data plic_data;
struct plic_data plic_data;
unsigned long clint_data;
int rc;
@ -102,19 +102,19 @@ static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
/* By default, enable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(m_cntx_id, i, 1);
plic_set_ie(&plic, m_cntx_id, i, 1);
}
/* Enable all IRQs for S-mode of target HART */
if (s_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(s_cntx_id, i, 1);
plic_set_ie(&plic, s_cntx_id, i, 1);
}
/* By default, enable M-mode threshold */
if (m_cntx_id > -1)
plic_set_thresh(m_cntx_id, 1);
plic_set_thresh(&plic, m_cntx_id, 1);
/* By default, disable S-mode threshold */
if (s_cntx_id > -1)
plic_set_thresh(s_cntx_id, 0);
plic_set_thresh(&plic, s_cntx_id, 0);
return 0;
}
@ -128,8 +128,7 @@ static int openpiton_irqchip_init(bool cold_boot)
int ret;
if (cold_boot) {
ret = plic_cold_irqchip_init(plic.addr,
plic.num_src);
ret = plic_cold_irqchip_init(&plic);
if (ret)
return ret;
}

10
platform/kendryte/k210/platform.c
View file

@ -17,6 +17,11 @@
#include <sbi_utils/sys/clint.h>
#include "platform.h"
static struct plic_data plic = {
.addr = K210_PLIC_BASE_ADDR,
.num_src = K210_PLIC_NUM_SOURCES,
};
static u32 k210_get_clk_freq(void)
{
u32 clksel0, pll0;
@ -58,13 +63,12 @@ static int k210_irqchip_init(bool cold_boot)
u32 hartid = current_hartid();
if (cold_boot) {
rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,
K210_PLIC_NUM_SOURCES);
rc = plic_cold_irqchip_init(&plic);
if (rc)
return rc;
}
return plic_warm_irqchip_init(hartid * 2, hartid * 2 + 1);
return plic_warm_irqchip_init(&plic, hartid * 2, hartid * 2 + 1);
}
static int k210_ipi_init(bool cold_boot)

10
platform/nuclei/ux600/platform.c
View file

@ -43,6 +43,11 @@
/* clang-format on */
static struct plic_data plic = {
.addr = UX600_PLIC_ADDR,
.num_src = UX600_PLIC_NUM_SOURCES,
};
static void ux600_modify_dt(void *fdt)
{
fdt_fixups(fdt);
@ -73,13 +78,12 @@ static int ux600_irqchip_init(bool cold_boot)
u32 hartid = current_hartid();
if (cold_boot) {
rc = plic_cold_irqchip_init(UX600_PLIC_ADDR,
UX600_PLIC_NUM_SOURCES);
rc = plic_cold_irqchip_init(&plic);
if (rc)
return rc;
}
return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
(hartid) ? (2 * hartid) : -1);
}

10
platform/sifive/fu540/platform.c
View file

@ -46,6 +46,11 @@
/* clang-format on */
static struct plic_data plic = {
.addr = FU540_PLIC_ADDR,
.num_src = FU540_PLIC_NUM_SOURCES,
};
static void fu540_modify_dt(void *fdt)
{
fdt_cpu_fixup(fdt);
@ -88,13 +93,12 @@ static int fu540_irqchip_init(bool cold_boot)
u32 hartid = current_hartid();
if (cold_boot) {
rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,
FU540_PLIC_NUM_SOURCES);
rc = plic_cold_irqchip_init(&plic);
if (rc)
return rc;
}
return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
(hartid) ? (2 * hartid) : -1);
}

20
platform/template/platform.c
View file

@ -17,6 +17,19 @@
#include <sbi_utils/serial/uart8250.h>
#include <sbi_utils/sys/clint.h>
#define PLATFORM_PLIC_ADDR 0xc000000
#define PLATFORM_PLIC_NUM_SOURCES 128
#define PLATFORM_HART_COUNT 4
#define PLATFORM_CLINT_ADDR 0x2000000
#define PLATFORM_UART_ADDR 0x09000000
#define PLATFORM_UART_INPUT_FREQ 10000000
#define PLATFORM_UART_BAUDRATE 115200
static struct plic_data plic = {
.addr = PLATFORM_PLIC_ADDR,
.num_src = PLATFORM_PLIC_NUM_SOURCES,
};
/*
* Platform early initialization.
*/
@ -39,7 +52,7 @@ static int platform_final_init(bool cold_boot)
static int platform_console_init(void)
{
/* Example if the generic UART8250 driver is used */
return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_SHIFTREG_ADDR,
return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
PLATFORM_UART_BAUDRATE, 0, 1);
}
@ -70,13 +83,12 @@ static int platform_irqchip_init(bool cold_boot)
/* Example if the generic PLIC driver is used */
if (cold_boot) {
ret = plic_cold_irqchip_init(PLATFORM_PLIC_ADDR,
PLATFORM_PLIC_NUM_SOURCES);
ret = plic_cold_irqchip_init(&plic);
if (ret)
return ret;
}
return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
}
/*