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platform: andes/ae350: Use fdt serial driver
Andes UART is compatible with uart8250 driver. We can use fdt_serial_init() as platform console init hook. dts example: serial0: serial@f0300000 { compatible = "andestech,uart16550", "ns16550a"; reg = <0x00000000 0xf0300000 0x00000000 0x00001000>; interrupts = <9 4>; interrupt-parent = <&plic0>; clock-frequency = <19660800>; current-speed = <38400>; reg-shift = <2>; reg-offset = <32>; reg-io-width = <4>; no-loopback-test = <1>; }; Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
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3 changed files with 4 additions and 22 deletions
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@ -4,7 +4,8 @@ config PLATFORM_ANDES_AE350
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bool
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select FDT
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select IRQCHIP_PLIC
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select SERIAL_UART8250
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select FDT_SERIAL
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select FDT_SERIAL_UART8250
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default y
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if PLATFORM_ANDES_AE350
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@ -18,7 +18,7 @@
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/serial/fdt_serial.h>
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#include "platform.h"
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#include "plicsw.h"
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#include "plmt.h"
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@ -43,17 +43,6 @@ static int ae350_final_init(bool cold_boot)
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return 0;
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}
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/* Initialize the platform console. */
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static int ae350_console_init(void)
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{
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return uart8250_init(AE350_UART_ADDR,
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AE350_UART_FREQUENCY,
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AE350_UART_BAUDRATE,
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AE350_UART_REG_SHIFT,
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AE350_UART_REG_WIDTH,
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AE350_UART_REG_OFFSET);
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}
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/* Initialize the platform interrupt controller for current HART. */
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static int ae350_irqchip_init(bool cold_boot)
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{
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@ -155,7 +144,7 @@ static int ae350_vendor_ext_provider(long extid, long funcid,
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const struct sbi_platform_operations platform_ops = {
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.final_init = ae350_final_init,
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.console_init = ae350_console_init,
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.console_init = fdt_serial_init,
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.irqchip_init = ae350_irqchip_init,
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@ -22,14 +22,6 @@
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#define AE350_L2C_ADDR 0xe0500000
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#define AE350_UART_ADDR_OFFSET 0x20
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#define AE350_UART_ADDR (0xf0300000 + AE350_UART_ADDR_OFFSET)
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#define AE350_UART_FREQUENCY 19660800
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#define AE350_UART_BAUDRATE 38400
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#define AE350_UART_REG_SHIFT 2
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#define AE350_UART_REG_WIDTH 0
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#define AE350_UART_REG_OFFSET 0
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/*Memory and Miscellaneous Registers*/
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#define CSR_MILMB 0x7c0
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#define CSR_MDLMB 0x7c1
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