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platform: Replace CLINT library usage with ACLINT library
The ACLINT devices are backward compatible with SiFive CLINT so we replace all CLINT library usage in various platforms with ACLINT library. As a result of this replacement, the CLINT library is not used by any part of OpenSBI hence we remove it. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com>
This commit is contained in:
parent
03d6bb51ba
commit
a731c7e369
9 changed files with 107 additions and 337 deletions
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@ -1,41 +0,0 @@
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/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __SYS_CLINT_H__
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#define __SYS_CLINT_H__
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#include <sbi/sbi_types.h>
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struct clint_data {
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/* Public details */
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unsigned long addr;
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u32 first_hartid;
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u32 hart_count;
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bool has_64bit_mmio;
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/* Private details (initialized and used by CLINT library)*/
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u32 *ipi;
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struct clint_data *time_delta_reference;
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unsigned long time_delta_computed;
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u64 time_delta;
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u64 *time_val;
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u64 *time_cmp;
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u64 (*time_rd)(volatile u64 *addr);
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void (*time_wr)(u64 value, volatile u64 *addr);
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};
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int clint_warm_ipi_init(void);
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int clint_cold_ipi_init(struct clint_data *clint);
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int clint_warm_timer_init(void);
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int clint_cold_timer_init(struct clint_data *clint,
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struct clint_data *reference);
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#endif
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/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_domain.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_hartmask.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_timer.h>
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#include <sbi_utils/sys/clint.h>
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#define CLINT_IPI_OFF 0
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#define CLINT_IPI_SIZE 0x4000
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#define CLINT_TIME_CMP_OFF 0x4000
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#define CLINT_TIME_CMP_SIZE 0x4000
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#define CLINT_TIME_VAL_OFF 0xbff8
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#define CLINT_TIME_VAL_SIZE 0x4000
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static struct clint_data *clint_ipi_hartid2data[SBI_HARTMASK_MAX_BITS];
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static void clint_ipi_send(u32 target_hart)
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{
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struct clint_data *clint;
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if (SBI_HARTMASK_MAX_BITS <= target_hart)
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return;
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clint = clint_ipi_hartid2data[target_hart];
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if (!clint)
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return;
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/* Set CLINT IPI */
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writel(1, &clint->ipi[target_hart - clint->first_hartid]);
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}
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static void clint_ipi_clear(u32 target_hart)
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{
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struct clint_data *clint;
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if (SBI_HARTMASK_MAX_BITS <= target_hart)
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return;
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clint = clint_ipi_hartid2data[target_hart];
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if (!clint)
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return;
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/* Clear CLINT IPI */
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writel(0, &clint->ipi[target_hart - clint->first_hartid]);
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}
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static struct sbi_ipi_device clint_ipi = {
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.name = "clint",
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.ipi_send = clint_ipi_send,
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.ipi_clear = clint_ipi_clear
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};
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int clint_warm_ipi_init(void)
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{
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/* Clear CLINT IPI for current HART */
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clint_ipi_clear(current_hartid());
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return 0;
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}
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int clint_cold_ipi_init(struct clint_data *clint)
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{
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u32 i;
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int rc;
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struct sbi_domain_memregion reg;
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if (!clint)
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return SBI_EINVAL;
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/* Initialize private data */
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clint->ipi = (void *)clint->addr;
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/* Update IPI hartid table */
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for (i = 0; i < clint->hart_count; i++)
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clint_ipi_hartid2data[clint->first_hartid + i] = clint;
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/* Add CLINT ipi region to the root domain */
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sbi_domain_memregion_init(clint->addr + CLINT_IPI_OFF,
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CLINT_IPI_SIZE,
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SBI_DOMAIN_MEMREGION_MMIO, ®);
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rc = sbi_domain_root_add_memregion(®);
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if (rc)
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return rc;
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sbi_ipi_set_device(&clint_ipi);
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return 0;
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}
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static struct clint_data *clint_timer_hartid2data[SBI_HARTMASK_MAX_BITS];
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#if __riscv_xlen != 32
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static u64 clint_time_rd64(volatile u64 *addr)
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{
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return readq_relaxed(addr);
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}
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static void clint_time_wr64(u64 value, volatile u64 *addr)
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{
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writeq_relaxed(value, addr);
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}
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#endif
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static u64 clint_time_rd32(volatile u64 *addr)
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{
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u32 lo, hi;
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do {
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hi = readl_relaxed((u32 *)addr + 1);
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lo = readl_relaxed((u32 *)addr);
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} while (hi != readl_relaxed((u32 *)addr + 1));
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return ((u64)hi << 32) | (u64)lo;
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}
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static void clint_time_wr32(u64 value, volatile u64 *addr)
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{
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u32 mask = -1U;
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writel_relaxed(value & mask, (void *)(addr));
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writel_relaxed(value >> 32, (void *)(addr) + 0x04);
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}
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static u64 clint_timer_value(void)
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{
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struct clint_data *clint = clint_timer_hartid2data[current_hartid()];
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/* Read CLINT Time Value */
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return clint->time_rd(clint->time_val) + clint->time_delta;
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}
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static void clint_timer_event_stop(void)
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{
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u32 target_hart = current_hartid();
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struct clint_data *clint = clint_timer_hartid2data[target_hart];
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/* Clear CLINT Time Compare */
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clint->time_wr(-1ULL,
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&clint->time_cmp[target_hart - clint->first_hartid]);
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}
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static void clint_timer_event_start(u64 next_event)
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{
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u32 target_hart = current_hartid();
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struct clint_data *clint = clint_timer_hartid2data[target_hart];
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/* Program CLINT Time Compare */
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clint->time_wr(next_event - clint->time_delta,
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&clint->time_cmp[target_hart - clint->first_hartid]);
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}
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static struct sbi_timer_device clint_timer = {
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.name = "clint",
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.timer_value = clint_timer_value,
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.timer_event_start = clint_timer_event_start,
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.timer_event_stop = clint_timer_event_stop
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};
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int clint_warm_timer_init(void)
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{
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u64 v1, v2, mv;
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u32 target_hart = current_hartid();
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struct clint_data *reference;
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struct clint_data *clint = clint_timer_hartid2data[target_hart];
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if (!clint)
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return SBI_ENODEV;
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/*
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* Compute delta if reference available
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*
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* We deliberately compute time_delta in warm init so that time_delta
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* is computed on a HART which is going to use given CLINT. We use
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* atomic flag timer_delta_computed to ensure that only one HART does
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* time_delta computation.
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*/
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if (clint->time_delta_reference) {
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reference = clint->time_delta_reference;
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if (!atomic_raw_xchg_ulong(&clint->time_delta_computed, 1)) {
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v1 = clint->time_rd(clint->time_val);
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mv = reference->time_rd(reference->time_val);
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v2 = clint->time_rd(clint->time_val);
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clint->time_delta = mv - ((v1 / 2) + (v2 / 2));
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}
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}
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/* Clear CLINT Time Compare */
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clint->time_wr(-1ULL,
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&clint->time_cmp[target_hart - clint->first_hartid]);
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return 0;
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}
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int clint_cold_timer_init(struct clint_data *clint,
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struct clint_data *reference)
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{
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u32 i;
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int rc;
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struct sbi_domain_memregion reg;
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if (!clint)
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return SBI_EINVAL;
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/* Initialize private data */
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clint->time_delta_reference = reference;
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clint->time_delta_computed = 0;
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clint->time_delta = 0;
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clint->time_val = (u64 *)((void *)clint->addr + CLINT_TIME_VAL_OFF);
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clint->time_cmp = (u64 *)((void *)clint->addr + CLINT_TIME_CMP_OFF);
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clint->time_rd = clint_time_rd32;
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clint->time_wr = clint_time_wr32;
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/* Override read/write accessors for 64bit MMIO */
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#if __riscv_xlen != 32
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if (clint->has_64bit_mmio) {
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clint->time_rd = clint_time_rd64;
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clint->time_wr = clint_time_wr64;
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}
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#endif
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/* Update timer hartid table */
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for (i = 0; i < clint->hart_count; i++)
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clint_timer_hartid2data[clint->first_hartid + i] = clint;
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/* Add CLINT mtime region to the root domain */
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sbi_domain_memregion_init(clint->addr + CLINT_TIME_VAL_OFF,
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CLINT_TIME_VAL_SIZE,
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SBI_DOMAIN_MEMREGION_MMIO, ®);
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rc = sbi_domain_root_add_memregion(®);
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if (rc)
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return rc;
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/* Add CLINT timecmp region to the root domain */
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sbi_domain_memregion_init(clint->addr + CLINT_TIME_CMP_OFF,
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CLINT_TIME_CMP_SIZE,
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SBI_DOMAIN_MEMREGION_MMIO, ®);
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rc = sbi_domain_root_add_memregion(®);
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if (rc)
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return rc;
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sbi_timer_set_device(&clint_timer);
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return 0;
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}
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# Anup Patel <anup.patel@wdc.com>
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# Anup Patel <anup.patel@wdc.com>
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#
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#
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libsbiutils-objs-y += sys/clint.o
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libsbiutils-objs-y += sys/htif.o
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libsbiutils-objs-y += sys/htif.o
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libsbiutils-objs-y += sys/sifive_test.o
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libsbiutils-objs-y += sys/sifive_test.o
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_platform.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/ipi/aclint_mswi.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/sys/clint.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define ARIANE_UART_ADDR 0x10000000
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#define ARIANE_UART_ADDR 0x10000000
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#define ARIANE_UART_FREQ 50000000
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#define ARIANE_UART_FREQ 50000000
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#define ARIANE_PLIC_NUM_SOURCES 3
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#define ARIANE_PLIC_NUM_SOURCES 3
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#define ARIANE_HART_COUNT 1
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#define ARIANE_HART_COUNT 1
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#define ARIANE_CLINT_ADDR 0x2000000
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#define ARIANE_CLINT_ADDR 0x2000000
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#define ARIANE_ACLINT_MSWI_ADDR (ARIANE_CLINT_ADDR + \
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CLINT_MSWI_OFFSET)
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#define ARIANE_ACLINT_MTIMER_ADDR (ARIANE_CLINT_ADDR + \
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CLINT_MTIMER_OFFSET)
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static struct plic_data plic = {
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static struct plic_data plic = {
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.addr = ARIANE_PLIC_ADDR,
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.addr = ARIANE_PLIC_ADDR,
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.num_src = ARIANE_PLIC_NUM_SOURCES,
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.num_src = ARIANE_PLIC_NUM_SOURCES,
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};
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};
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static struct clint_data clint = {
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static struct aclint_mswi_data mswi = {
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.addr = ARIANE_CLINT_ADDR,
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.addr = ARIANE_ACLINT_MSWI_ADDR,
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.size = ACLINT_MSWI_SIZE,
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.first_hartid = 0,
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.hart_count = ARIANE_HART_COUNT,
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};
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static struct aclint_mtimer_data mtimer = {
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.addr = ARIANE_ACLINT_MTIMER_ADDR,
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.size = ACLINT_MTIMER_SIZE,
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.first_hartid = 0,
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.first_hartid = 0,
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.hart_count = ARIANE_HART_COUNT,
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.hart_count = ARIANE_HART_COUNT,
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.has_64bit_mmio = TRUE,
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.has_64bit_mmio = TRUE,
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int ret;
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int ret;
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if (cold_boot) {
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if (cold_boot) {
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ret = clint_cold_ipi_init(&clint);
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ret = aclint_mswi_cold_init(&mswi);
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if (ret)
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if (ret)
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return ret;
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return ret;
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}
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}
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return clint_warm_ipi_init();
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return aclint_mswi_warm_init();
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}
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}
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/*
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/*
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||||||
|
@ -139,12 +152,12 @@ static int ariane_timer_init(bool cold_boot)
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (cold_boot) {
|
if (cold_boot) {
|
||||||
ret = clint_cold_timer_init(&clint, NULL);
|
ret = aclint_mtimer_cold_init(&mtimer, NULL);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
return clint_warm_timer_init();
|
return aclint_mtimer_warm_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -12,9 +12,10 @@
|
||||||
#include <sbi/sbi_platform.h>
|
#include <sbi/sbi_platform.h>
|
||||||
#include <sbi_utils/fdt/fdt_helper.h>
|
#include <sbi_utils/fdt/fdt_helper.h>
|
||||||
#include <sbi_utils/fdt/fdt_fixup.h>
|
#include <sbi_utils/fdt/fdt_fixup.h>
|
||||||
|
#include <sbi_utils/ipi/aclint_mswi.h>
|
||||||
#include <sbi_utils/irqchip/plic.h>
|
#include <sbi_utils/irqchip/plic.h>
|
||||||
#include <sbi_utils/serial/uart8250.h>
|
#include <sbi_utils/serial/uart8250.h>
|
||||||
#include <sbi_utils/sys/clint.h>
|
#include <sbi_utils/timer/aclint_mtimer.h>
|
||||||
|
|
||||||
#define OPENPITON_DEFAULT_UART_ADDR 0xfff0c2c000
|
#define OPENPITON_DEFAULT_UART_ADDR 0xfff0c2c000
|
||||||
#define OPENPITON_DEFAULT_UART_FREQ 60000000
|
#define OPENPITON_DEFAULT_UART_FREQ 60000000
|
||||||
|
@ -25,6 +26,10 @@
|
||||||
#define OPENPITON_DEFAULT_PLIC_NUM_SOURCES 2
|
#define OPENPITON_DEFAULT_PLIC_NUM_SOURCES 2
|
||||||
#define OPENPITON_DEFAULT_HART_COUNT 3
|
#define OPENPITON_DEFAULT_HART_COUNT 3
|
||||||
#define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000
|
#define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000
|
||||||
|
#define OPENPITON_DEFAULT_ACLINT_MSWI_ADDR \
|
||||||
|
(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MSWI_OFFSET)
|
||||||
|
#define OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR \
|
||||||
|
(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MTIMER_OFFSET)
|
||||||
|
|
||||||
static struct platform_uart_data uart = {
|
static struct platform_uart_data uart = {
|
||||||
OPENPITON_DEFAULT_UART_ADDR,
|
OPENPITON_DEFAULT_UART_ADDR,
|
||||||
|
@ -36,8 +41,16 @@ static struct plic_data plic = {
|
||||||
.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
|
.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clint_data clint = {
|
static struct aclint_mswi_data mswi = {
|
||||||
.addr = OPENPITON_DEFAULT_CLINT_ADDR,
|
.addr = OPENPITON_DEFAULT_ACLINT_MSWI_ADDR,
|
||||||
|
.size = ACLINT_MSWI_SIZE,
|
||||||
|
.first_hartid = 0,
|
||||||
|
.hart_count = OPENPITON_DEFAULT_HART_COUNT,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct aclint_mtimer_data mtimer = {
|
||||||
|
.addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR,
|
||||||
|
.size = ACLINT_MTIMER_SIZE,
|
||||||
.first_hartid = 0,
|
.first_hartid = 0,
|
||||||
.hart_count = OPENPITON_DEFAULT_HART_COUNT,
|
.hart_count = OPENPITON_DEFAULT_HART_COUNT,
|
||||||
.has_64bit_mmio = TRUE,
|
.has_64bit_mmio = TRUE,
|
||||||
|
@ -67,8 +80,10 @@ static int openpiton_early_init(bool cold_boot)
|
||||||
plic = plic_data;
|
plic = plic_data;
|
||||||
|
|
||||||
rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
|
rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
|
||||||
if (!rc)
|
if (!rc) {
|
||||||
clint.addr = clint_addr;
|
mswi.addr = clint_addr;
|
||||||
|
mtimer.addr = clint_addr + CLINT_MTIMER_OFFSET;
|
||||||
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -149,12 +164,12 @@ static int openpiton_ipi_init(bool cold_boot)
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (cold_boot) {
|
if (cold_boot) {
|
||||||
ret = clint_cold_ipi_init(&clint);
|
ret = aclint_mswi_cold_init(&mswi);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
return clint_warm_ipi_init();
|
return aclint_mswi_warm_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -165,12 +180,12 @@ static int openpiton_timer_init(bool cold_boot)
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (cold_boot) {
|
if (cold_boot) {
|
||||||
ret = clint_cold_timer_init(&clint, NULL);
|
ret = aclint_mtimer_cold_init(&mtimer, NULL);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
return clint_warm_timer_init();
|
return aclint_mtimer_warm_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -14,9 +14,10 @@
|
||||||
#include <sbi/sbi_platform.h>
|
#include <sbi/sbi_platform.h>
|
||||||
#include <sbi/sbi_system.h>
|
#include <sbi/sbi_system.h>
|
||||||
#include <sbi_utils/fdt/fdt_fixup.h>
|
#include <sbi_utils/fdt/fdt_fixup.h>
|
||||||
|
#include <sbi_utils/ipi/aclint_mswi.h>
|
||||||
#include <sbi_utils/irqchip/plic.h>
|
#include <sbi_utils/irqchip/plic.h>
|
||||||
#include <sbi_utils/serial/sifive-uart.h>
|
#include <sbi_utils/serial/sifive-uart.h>
|
||||||
#include <sbi_utils/sys/clint.h>
|
#include <sbi_utils/timer/aclint_mtimer.h>
|
||||||
#include "platform.h"
|
#include "platform.h"
|
||||||
|
|
||||||
extern const char dt_k210_start[];
|
extern const char dt_k210_start[];
|
||||||
|
@ -33,8 +34,16 @@ static struct plic_data plic = {
|
||||||
.num_src = K210_PLIC_NUM_SOURCES,
|
.num_src = K210_PLIC_NUM_SOURCES,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clint_data clint = {
|
static struct aclint_mswi_data mswi = {
|
||||||
.addr = K210_CLINT_BASE_ADDR,
|
.addr = K210_ACLINT_MSWI_ADDR,
|
||||||
|
.size = ACLINT_MSWI_SIZE,
|
||||||
|
.first_hartid = 0,
|
||||||
|
.hart_count = K210_HART_COUNT,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct aclint_mtimer_data mtimer = {
|
||||||
|
.addr = K210_ACLINT_MTIMER_ADDR,
|
||||||
|
.size = ACLINT_MTIMER_SIZE,
|
||||||
.first_hartid = 0,
|
.first_hartid = 0,
|
||||||
.hart_count = K210_HART_COUNT,
|
.hart_count = K210_HART_COUNT,
|
||||||
.has_64bit_mmio = TRUE,
|
.has_64bit_mmio = TRUE,
|
||||||
|
@ -139,12 +148,12 @@ static int k210_ipi_init(bool cold_boot)
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
if (cold_boot) {
|
if (cold_boot) {
|
||||||
rc = clint_cold_ipi_init(&clint);
|
rc = aclint_mswi_cold_init(&mswi);
|
||||||
if (rc)
|
if (rc)
|
||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
return clint_warm_ipi_init();
|
return aclint_mswi_warm_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
static int k210_timer_init(bool cold_boot)
|
static int k210_timer_init(bool cold_boot)
|
||||||
|
@ -152,12 +161,12 @@ static int k210_timer_init(bool cold_boot)
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
if (cold_boot) {
|
if (cold_boot) {
|
||||||
rc = clint_cold_timer_init(&clint, NULL);
|
rc = aclint_mtimer_cold_init(&mtimer, NULL);
|
||||||
if (rc)
|
if (rc)
|
||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
return clint_warm_timer_init();
|
return aclint_mtimer_warm_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
const struct sbi_platform_operations platform_ops = {
|
const struct sbi_platform_operations platform_ops = {
|
||||||
|
|
|
@ -22,6 +22,10 @@
|
||||||
#define K210_SYSCTL_BASE_ADDR 0x50440000ULL
|
#define K210_SYSCTL_BASE_ADDR 0x50440000ULL
|
||||||
#define K210_UART_BASE_ADDR 0x38000000ULL
|
#define K210_UART_BASE_ADDR 0x38000000ULL
|
||||||
#define K210_CLINT_BASE_ADDR 0x02000000ULL
|
#define K210_CLINT_BASE_ADDR 0x02000000ULL
|
||||||
|
#define K210_ACLINT_MSWI_ADDR \
|
||||||
|
(K210_CLINT_BASE_ADDR + CLINT_MSWI_OFFSET)
|
||||||
|
#define K210_ACLINT_MTIMER_ADDR \
|
||||||
|
(K210_CLINT_BASE_ADDR + CLINT_MTIMER_OFFSET)
|
||||||
#define K210_PLIC_BASE_ADDR 0x0C000000ULL
|
#define K210_PLIC_BASE_ADDR 0x0C000000ULL
|
||||||
|
|
||||||
/* Registers */
|
/* Registers */
|
||||||
|
|
|
@ -17,9 +17,10 @@
|
||||||
#include <sbi/sbi_platform.h>
|
#include <sbi/sbi_platform.h>
|
||||||
#include <sbi/sbi_system.h>
|
#include <sbi/sbi_system.h>
|
||||||
#include <sbi_utils/fdt/fdt_fixup.h>
|
#include <sbi_utils/fdt/fdt_fixup.h>
|
||||||
|
#include <sbi_utils/ipi/aclint_mswi.h>
|
||||||
#include <sbi_utils/irqchip/plic.h>
|
#include <sbi_utils/irqchip/plic.h>
|
||||||
#include <sbi_utils/serial/sifive-uart.h>
|
#include <sbi_utils/serial/sifive-uart.h>
|
||||||
#include <sbi_utils/sys/clint.h>
|
#include <sbi_utils/timer/aclint_mtimer.h>
|
||||||
|
|
||||||
/* clang-format off */
|
/* clang-format off */
|
||||||
|
|
||||||
|
@ -32,6 +33,10 @@
|
||||||
#define UX600_NUCLEI_TIMER_MSFTRST_KEY 0x80000A5F
|
#define UX600_NUCLEI_TIMER_MSFTRST_KEY 0x80000A5F
|
||||||
/* The clint compatiable timer offset is 0x1000 against nuclei timer */
|
/* The clint compatiable timer offset is 0x1000 against nuclei timer */
|
||||||
#define UX600_CLINT_TIMER_ADDR (UX600_NUCLEI_TIMER_ADDR + 0x1000)
|
#define UX600_CLINT_TIMER_ADDR (UX600_NUCLEI_TIMER_ADDR + 0x1000)
|
||||||
|
#define UX600_ACLINT_MSWI_ADDR (UX600_CLINT_TIMER_ADDR + \
|
||||||
|
CLINT_MSWI_OFFSET)
|
||||||
|
#define UX600_ACLINT_MTIMER_ADDR (UX600_CLINT_TIMER_ADDR + \
|
||||||
|
CLINT_MTIMER_OFFSET)
|
||||||
|
|
||||||
#define UX600_PLIC_ADDR 0x8000000
|
#define UX600_PLIC_ADDR 0x8000000
|
||||||
#define UX600_PLIC_NUM_SOURCES 0x35
|
#define UX600_PLIC_NUM_SOURCES 0x35
|
||||||
|
@ -61,12 +66,21 @@ static struct plic_data plic = {
|
||||||
.num_src = UX600_PLIC_NUM_SOURCES,
|
.num_src = UX600_PLIC_NUM_SOURCES,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clint_data clint = {
|
static struct aclint_mswi_data mswi = {
|
||||||
.addr = UX600_CLINT_TIMER_ADDR,
|
.addr = UX600_ACLINT_MSWI_ADDR,
|
||||||
|
.size = ACLINT_MSWI_SIZE,
|
||||||
|
.first_hartid = 0,
|
||||||
|
.hart_count = UX600_HART_COUNT,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct aclint_mtimer_data mtimer = {
|
||||||
|
.addr = UX600_ACLINT_MTIMER_ADDR,
|
||||||
|
.size = ACLINT_MTIMER_SIZE,
|
||||||
.first_hartid = 0,
|
.first_hartid = 0,
|
||||||
.hart_count = UX600_HART_COUNT,
|
.hart_count = UX600_HART_COUNT,
|
||||||
.has_64bit_mmio = TRUE,
|
.has_64bit_mmio = TRUE,
|
||||||
};
|
};
|
||||||
|
|
||||||
static u32 measure_cpu_freq(u32 n)
|
static u32 measure_cpu_freq(u32 n)
|
||||||
{
|
{
|
||||||
u32 start_mtime, delta_mtime;
|
u32 start_mtime, delta_mtime;
|
||||||
|
@ -188,12 +202,12 @@ static int ux600_ipi_init(bool cold_boot)
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
if (cold_boot) {
|
if (cold_boot) {
|
||||||
rc = clint_cold_ipi_init(&clint);
|
rc = aclint_mswi_cold_init(&mswi);
|
||||||
if (rc)
|
if (rc)
|
||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
return clint_warm_ipi_init();
|
return aclint_mswi_warm_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ux600_timer_init(bool cold_boot)
|
static int ux600_timer_init(bool cold_boot)
|
||||||
|
@ -201,12 +215,12 @@ static int ux600_timer_init(bool cold_boot)
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
if (cold_boot) {
|
if (cold_boot) {
|
||||||
rc = clint_cold_timer_init(&clint, NULL);
|
rc = aclint_mtimer_cold_init(&mtimer, NULL);
|
||||||
if (rc)
|
if (rc)
|
||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
return clint_warm_timer_init();
|
return aclint_mtimer_warm_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
const struct sbi_platform_operations platform_ops = {
|
const struct sbi_platform_operations platform_ops = {
|
||||||
|
|
|
@ -13,14 +13,19 @@
|
||||||
* Include these files as needed.
|
* Include these files as needed.
|
||||||
* See config.mk PLATFORM_xxx configuration parameters.
|
* See config.mk PLATFORM_xxx configuration parameters.
|
||||||
*/
|
*/
|
||||||
|
#include <sbi_utils/ipi/aclint_mswi.h>
|
||||||
#include <sbi_utils/irqchip/plic.h>
|
#include <sbi_utils/irqchip/plic.h>
|
||||||
#include <sbi_utils/serial/uart8250.h>
|
#include <sbi_utils/serial/uart8250.h>
|
||||||
#include <sbi_utils/sys/clint.h>
|
#include <sbi_utils/timer/aclint_mtimer.h>
|
||||||
|
|
||||||
#define PLATFORM_PLIC_ADDR 0xc000000
|
#define PLATFORM_PLIC_ADDR 0xc000000
|
||||||
#define PLATFORM_PLIC_NUM_SOURCES 128
|
#define PLATFORM_PLIC_NUM_SOURCES 128
|
||||||
#define PLATFORM_HART_COUNT 4
|
#define PLATFORM_HART_COUNT 4
|
||||||
#define PLATFORM_CLINT_ADDR 0x2000000
|
#define PLATFORM_CLINT_ADDR 0x2000000
|
||||||
|
#define PLATFORM_ACLINT_MSWI_ADDR (PLATFORM_CLINT_ADDR + \
|
||||||
|
CLINT_MSWI_OFFSET)
|
||||||
|
#define PLATFORM_ACLINT_MTIMER_ADDR (PLATFORM_CLINT_ADDR + \
|
||||||
|
CLINT_MTIMER_OFFSET)
|
||||||
#define PLATFORM_UART_ADDR 0x09000000
|
#define PLATFORM_UART_ADDR 0x09000000
|
||||||
#define PLATFORM_UART_INPUT_FREQ 10000000
|
#define PLATFORM_UART_INPUT_FREQ 10000000
|
||||||
#define PLATFORM_UART_BAUDRATE 115200
|
#define PLATFORM_UART_BAUDRATE 115200
|
||||||
|
@ -30,8 +35,16 @@ static struct plic_data plic = {
|
||||||
.num_src = PLATFORM_PLIC_NUM_SOURCES,
|
.num_src = PLATFORM_PLIC_NUM_SOURCES,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clint_data clint = {
|
static struct aclint_mswi_data mswi = {
|
||||||
.addr = PLATFORM_CLINT_ADDR,
|
.addr = PLATFORM_ACLINT_MSWI_ADDR,
|
||||||
|
.size = ACLINT_MSWI_SIZE,
|
||||||
|
.first_hartid = 0,
|
||||||
|
.hart_count = PLATFORM_HART_COUNT,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct aclint_mtimer_data mtimer = {
|
||||||
|
.addr = PLATFORM_ACLINT_MTIMER_ADDR,
|
||||||
|
.size = ACLINT_MTIMER_SIZE,
|
||||||
.first_hartid = 0,
|
.first_hartid = 0,
|
||||||
.hart_count = PLATFORM_HART_COUNT,
|
.hart_count = PLATFORM_HART_COUNT,
|
||||||
.has_64bit_mmio = TRUE,
|
.has_64bit_mmio = TRUE,
|
||||||
|
@ -88,14 +101,14 @@ static int platform_ipi_init(bool cold_boot)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
/* Example if the generic CLINT driver is used */
|
/* Example if the generic ACLINT driver is used */
|
||||||
if (cold_boot) {
|
if (cold_boot) {
|
||||||
ret = clint_cold_ipi_init(&clint);
|
ret = aclint_mswi_cold_init(&mswi);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
return clint_warm_ipi_init();
|
return aclint_mswi_warm_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -105,14 +118,14 @@ static int platform_timer_init(bool cold_boot)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
/* Example if the generic CLINT driver is used */
|
/* Example if the generic ACLINT driver is used */
|
||||||
if (cold_boot) {
|
if (cold_boot) {
|
||||||
ret = clint_cold_timer_init(&clint, NULL);
|
ret = aclint_mtimer_cold_init(&mtimer, NULL);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
return clint_warm_timer_init();
|
return aclint_mtimer_warm_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue