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docs: Add domain device tree binding documentation
This patch adds domain device tree binding documentation in the OpenSBI domain support documentation. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
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Anup Patel
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@ -104,3 +104,211 @@ Few noteworthy effects of a system partitioned into domains are as follows:
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only work if both HART A and HART B are assigned same domain
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* A HART running in S-mode or U-mode can only access memory based on the
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memory regions of the domain assigned to the HART
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Domain Device Tree Bindings
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---------------------------
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The OpenSBI domains can be described in the **device tree (DT) blob** (or
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flattened device tree) passed to the OpenSBI firmwares by the previous
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booting stage. This allows OpenSBI platform support to parse and populate
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OpenSBI domains from the device tree blob (or flattened device tree).
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### Domain Configuration Node
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All OpenSBI domain description related DT nodes should be under the domain
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configuration DT node. The **/chosen** DT node is the preferred parent of
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the domain configuration DT node.
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The DT properties of a domain configuration DT node are as follows:
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* **compatible** (Mandatory) - The compatible string of the domain
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configuration. This DT property should have value *"opensbi,domain,config"*
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### Domain Memory Region Node
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The domain memory region DT node describes details of a memory region and
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can be pointed by multiple domain instance DT nodes. The access permissions
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of the memory region are specified separately in domain instance node.
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The DT properties of a domain memory region DT node are as follows:
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* **compatible** (Mandatory) - The compatible string of the domain memory
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region. This DT property should have value *"opensbi,domain,memregion"*
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* **base** (Mandatory) - The base address of the domain memory region. This
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DT property should have a **2 ^ order** aligned 64 bit address (i.e. two
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DT cells).
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* **order** (Mandatory) - The order of the domain memory region. This DT
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property should have a 32 bit value (i.e. one DT cell) in the range
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**3 <= order <= __riscv_xlen**.
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* **mmio** (Optional) - A boolean flag representing whether the domain
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memory region is a memory-mapped I/O (MMIO) region.
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* **devices** (Optional) - The list of device DT node phandles for devices
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which fall under this domain memory region.
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### Domain Instance Node
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The domain instance DT node describes set of possible HARTs, set of memory
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regions, and other details of a domain instance.
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The DT properties of a domain instance DT node are as follows:
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* **compatible** (Mandatory) - The compatible string of the domain instance.
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This DT property should have value *"opensbi,domain,instance"*
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* **possible-harts** (Optional) - The list of CPU DT node phandles for the
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the domain instance. This list represents the possible HARTs of the
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domain instance.
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* **regions** (Optional) - The list of domain memory region DT node phandle
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and access permissions for the domain instance. Each list entry is a pair
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of DT node phandle and access permissions. The access permissions are
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represented as a 32bit bitmask having bits: **readable** (BIT[0]),
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**writeable** (BIT[1]), **executable** (BIT[2]), and **m-mode** (BIT[3]).
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* **boot-hart** (Optional) - The DT node phandle of the HART booting the
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domain instance. If coldboot HART is assigned to the domain instance then
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this DT property is ignored and the coldboot HART is assumed to be the
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boot HART of the domain instance.
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* **next-arg1** (Optional) - The 64 bit next booting stage arg1 for the
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domain instance. If this DT property is not available and coldboot HART
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is not assigned to the domain instance then **0x0** is used as default
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value. If this DT property is not available and coldboot HART is assigned
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to the domain instance then **next booting stage arg1 of coldboot HART**
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is used as default value.
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* **next-addr** (Optional) - The 64 bit next booting stage address for the
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domain instance. If this DT property is not available and coldboot HART
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is not assigned to the domain instance then **0x0** is used as default
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value. If this DT property is not available and coldboot HART is assigned
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to the domain instance then **next booting stage address of coldboot HART**
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is used as default value.
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* **next-mode** (Optional) - The 32 bit next booting stage mode for the
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domain instance. The possible values of this DT property are: **0x1**
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(s-mode), and **0x0** (u-mode). If this DT property is not available
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and coldboot HART is not assigned to the domain instance then **0x1**
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is used as default value. If this DT property is not available and
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coldboot HART is assigned to the domain instance then **next booting
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stage mode of coldboot HART** is used as default value.
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* **system-reset-allowed** (Optional) - A boolean flag representing
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whether the domain instance is allowed to do system reset.
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### Assigning HART To Domain Instance
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By default, all HARTs are assigned to **the ROOT domain**. The OpenSBI
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platform support can provide the HART to domain instance assignment using
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platform specific callback.
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The HART to domain instance assignment can be parsed from the device tree
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using optional DT property **opensbi,domain** in each CPU DT node. The
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value of DT property **opensbi,domain** is the DT phandle of the domain
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instance DT node. If **opensbi,domain** DT property is not specified then
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corresponding HART is assigned to **the ROOT domain**.
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### Domain Configuration Only Accessible to OpenSBI
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The software running inside a domain instance should only be aware of
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devices and hardware resources accessible to itself.
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To hide domain configuration from domain instances, the following should
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be done:
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* The previous booting stage should preferably provide a separate device
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tree for each domain instance and mention location of device tree in
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respective domain instance DT nodes using **next-arg1** DT property.
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* If domain assigned to a HART does not have separate device tree then
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OpenSBI platform support should remove all domain configuration details
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from the device tree passed by previous booting stage before passing it
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to the next booting stage.
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### Example
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```
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chosen {
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opensbi-domains {
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compatible = "opensbi,domain,config";
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tmem: tmem {
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compatible = "opensbi,domain,memregion";
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base = <0x0 0x80100000>;
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order = <20>;
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};
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tuart: tuart {
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compatible = "opensbi,domain,memregion";
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base = <0x0 0x10011000>;
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order = <12>;
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mmio;
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devices = <&uart1>;
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};
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allmem: allmem {
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compatible = "opensbi,domain,memregion";
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base = <0x0 0x0>;
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order = <64>;
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};
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tdomain: trusted-domain {
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compatible = "opensbi,domain,instance";
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possible-harts = <&cpu0>;
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regions = <&tmem 0x7>, <&tuart 0x7>;
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boot-hart = <&cpu0>;
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next-arg1 = <0x0 0x0>;
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next-addr = <0x0 0x80100000>;
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next-mode = <0x0>;
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system-reset-allowed;
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};
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udomain: untrusted-domain {
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compatible = "opensbi,domain,instance";
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possible-harts = <&cpu1 &cpu2 &cpu3 &cpu4>;
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regions = <&tmem 0x0>, <&tuart 0x0>, <&allmem 0x7>;
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};
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <10000000>;
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cpu0: cpu@0 {
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device_type = "cpu";
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reg = <0x00>;
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compatible = "riscv";
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opensbi-domain = <&tdomain>;
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...
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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reg = <0x01>;
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compatible = "riscv";
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opensbi-domain = <&udomain>;
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...
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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reg = <0x02>;
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compatible = "riscv";
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opensbi-domain = <&udomain>;
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...
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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reg = <0x03>;
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compatible = "riscv";
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opensbi-domain = <&udomain>;
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...
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};
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cpu4: cpu@4 {
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device_type = "cpu";
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reg = <0x04>;
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compatible = "riscv";
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opensbi-domain = <&udomain>;
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...
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};
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};
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uart1: serial@10011000 {
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...
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};
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```
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