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lib: sbi: Synchronize PMP settings with virtual memory system
As per section 3.7.2 of RISC-V Privileged Specification, PMP settings must be synchronized with the virtual memory system after PMP settings have been written. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
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@ -22,6 +22,7 @@
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#include <sbi/sbi_pmu.h>
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#include <sbi/sbi_string.h>
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#include <sbi/sbi_trap.h>
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#include <sbi/sbi_hfence.h>
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extern void __sbi_expected_trap(void);
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extern void __sbi_expected_trap_hext(void);
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@ -321,6 +322,27 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
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}
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}
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/*
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* As per section 3.7.2 of privileged specification v1.12,
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* virtual address translations can be speculatively performed
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* (even before actual access). These, along with PMP traslations,
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* can be cached. This can pose a problem with CPU hotplug
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* and non-retentive suspend scenario because PMP states are
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* not preserved.
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* It is advisable to flush the caching structures under such
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* conditions.
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*/
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if (misa_extension('S')) {
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__asm__ __volatile__("sfence.vma");
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/*
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* If hypervisor mode is supported, flush caching
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* structures in guest mode too.
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*/
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if (misa_extension('H'))
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__sbi_hfence_gvma_all();
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}
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return 0;
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}
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