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firmware: Fix compile error for FW_PAYLOAD with latest GCC binutils
We get following compile error for FW_PAYLOAD with latest GCC binutils: fw_payload.o(.text+0x1961): 15 bytes required for alignment to 16-byte boundary, but only 14 present Further investigating, it turn-out to be a known issue with RISC-V GCC binutils. (Refer, https://github.com/riscv/riscv-gnu-toolchain/issues/298) As a work-around, we disable relaxation when including DTB and PAYLOAD binary in fw_payload.S. Reported-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
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@ -85,6 +85,14 @@ fw_options:
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add a0, zero, zero
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ret
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/*
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* We disable relaxation because use of ".align"
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* and ".balign" can potentially generate compile
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* errors with latest RISC-V GCC Binutils.
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*/
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.option push
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.option norelax
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#ifdef FW_PAYLOAD_FDT_PATH
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.align 4
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.section .text, "ax", %progbits
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@ -103,3 +111,5 @@ payload_bin:
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#else
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.incbin FW_PAYLOAD_PATH
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#endif
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.option pop
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