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On platforms with Smepmp, the MMIO regions accessed by M-mode need to be explicitly marked with M-mode only read/write or shared (both (M-mode and S-mode) read/write permission. If the above is not done then runtime PLIC access from M-mode on platforms with Smepmp will result in access fault when further results in CPU hotplug not working. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __IRQCHIP_PLIC_H__
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#define __IRQCHIP_PLIC_H__
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#include <sbi/sbi_types.h>
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struct plic_data {
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unsigned long addr;
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unsigned long size;
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unsigned long num_src;
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};
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/* So far, priorities on all consumers of these functions fit in 8 bits. */
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void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
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void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
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u32 num);
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void plic_context_save(const struct plic_data *plic, int context_id,
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u32 *enable, u32 *threshold, u32 num);
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void plic_context_restore(const struct plic_data *plic, int context_id,
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const u32 *enable, u32 threshold, u32 num);
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int plic_context_init(const struct plic_data *plic, int context_id,
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bool enable, u32 threshold);
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int plic_warm_irqchip_init(const struct plic_data *plic,
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int m_cntx_id, int s_cntx_id);
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int plic_cold_irqchip_init(const struct plic_data *plic);
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#endif
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