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7aa6c9aa96
We simplify MTIMER synchronization as follows: 1) Detect MTIMER devices with unique (or non-shared) MTIME register at boot-time 2) Select first MTIMER device with no associated HART as our reference MTIMER device 3) Only synchronize MTIMER devices with unique (or non-shared) MTIME register using reference MTIMER device 4) Directly update the MTIME register at time of synchronization because MTIME is a read/write register. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
120 lines
3.4 KiB
C
120 lines
3.4 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <libfdt.h>
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#include <sbi/sbi_error.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/timer/fdt_timer.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define MTIMER_MAX_NR 16
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static unsigned long mtimer_count = 0;
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static struct aclint_mtimer_data mtimer[MTIMER_MAX_NR];
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static struct aclint_mtimer_data *mt_reference = NULL;
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static int timer_mtimer_cold_init(void *fdt, int nodeoff,
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const struct fdt_match *match)
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{
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int i, rc;
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unsigned long offset, addr[2], size[2];
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struct aclint_mtimer_data *mt;
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if (MTIMER_MAX_NR <= mtimer_count)
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return SBI_ENOSPC;
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mt = &mtimer[mtimer_count];
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rc = fdt_parse_aclint_node(fdt, nodeoff, true,
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&addr[0], &size[0], &addr[1], &size[1],
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&mt->first_hartid, &mt->hart_count);
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if (rc)
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return rc;
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mt->has_64bit_mmio = true;
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mt->has_shared_mtime = false;
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if (match->data) { /* SiFive CLINT */
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/* Set CLINT addresses */
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mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
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mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;
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mt->mtime_addr = addr[0] + ACLINT_DEFAULT_MTIME_OFFSET;
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mt->mtime_size = size[0] - mt->mtimecmp_size;
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/* Adjust MTIMER address and size for CLINT device */
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offset = *((unsigned long *)match->data);
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mt->mtime_addr += offset;
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mt->mtimecmp_addr += offset;
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mt->mtime_size -= offset;
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/* Parse additional CLINT properties */
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if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc))
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mt->has_64bit_mmio = false;
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} else { /* RISC-V ACLINT MTIMER */
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/* Set ACLINT MTIMER addresses */
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mt->mtime_addr = addr[0];
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mt->mtime_size = size[0];
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mt->mtimecmp_addr = addr[1];
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mt->mtimecmp_size = size[1];
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/* Parse additional ACLINT MTIMER properties */
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if (fdt_getprop(fdt, nodeoff, "mtimer,no-64bit-mmio", &rc))
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mt->has_64bit_mmio = false;
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}
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/* Check if MTIMER device has shared MTIME address */
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mt->has_shared_mtime = false;
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for (i = 0; i < mtimer_count; i++) {
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if (mtimer[i].mtime_addr == mt->mtime_addr) {
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mt->has_shared_mtime = true;
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break;
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}
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}
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/* Initialize the MTIMER device */
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rc = aclint_mtimer_cold_init(mt, mt_reference);
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if (rc)
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return rc;
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/*
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* Select first MTIMER device with no associated HARTs as our
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* reference MTIMER device. This is only a temporary strategy
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* of selecting reference MTIMER device. In future, we might
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* define an optional DT property or some other mechanism to
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* help us select the reference MTIMER device.
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*/
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if (!mt->hart_count && !mt_reference) {
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mt_reference = mt;
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/*
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* Set reference for already propbed MTIMER devices
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* with non-shared MTIME
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*/
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for (i = 0; i < mtimer_count; i++)
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if (!mtimer[i].has_shared_mtime)
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aclint_mtimer_set_reference(&mtimer[i], mt);
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}
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/* Explicitly sync-up MTIMER devices not associated with any HARTs */
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if (!mt->hart_count)
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aclint_mtimer_sync(mt);
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mtimer_count++;
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return 0;
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}
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static unsigned long clint_offset = CLINT_MTIMER_OFFSET;
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static const struct fdt_match timer_mtimer_match[] = {
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{ .compatible = "riscv,clint0", .data = &clint_offset },
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{ .compatible = "sifive,clint0", .data = &clint_offset },
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{ .compatible = "riscv,aclint-mtimer" },
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{ },
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};
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struct fdt_timer fdt_timer_mtimer = {
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.match_table = timer_mtimer_match,
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.cold_init = timer_mtimer_cold_init,
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.warm_init = aclint_mtimer_warm_init,
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.exit = NULL,
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};
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