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https://github.com/Fishwaldo/opensbi.git
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e9d08bd99c
Starfive JH7110 I2C IP is synopsys designware. Minimum StarFIve I2C driver to read/send bytes over I2C bus. This allows querying information and perform operation of onboard PMIC, as well as power-off and reset. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
190 lines
4.3 KiB
C
190 lines
4.3 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2022 starfivetech.com
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*
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* Authors:
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* Minda Chen <minda.chen@starfivetech.com>
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*/
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_timer.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_string.h>
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#include <sbi/sbi_bitops.h>
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#include <sbi_utils/i2c/dw_i2c.h>
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#define DW_IC_CON 0x00
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#define DW_IC_TAR 0x04
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#define DW_IC_SAR 0x08
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#define DW_IC_DATA_CMD 0x10
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#define DW_IC_SS_SCL_HCNT 0x14
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#define DW_IC_SS_SCL_LCNT 0x18
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#define DW_IC_FS_SCL_HCNT 0x1c
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#define DW_IC_FS_SCL_LCNT 0x20
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#define DW_IC_HS_SCL_HCNT 0x24
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#define DW_IC_HS_SCL_LCNT 0x28
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#define DW_IC_INTR_STAT 0x2c
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#define DW_IC_INTR_MASK 0x30
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#define DW_IC_RAW_INTR_STAT 0x34
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#define DW_IC_RX_TL 0x38
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#define DW_IC_TX_TL 0x3c
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#define DW_IC_CLR_INTR 0x40
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#define DW_IC_CLR_RX_UNDER 0x44
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#define DW_IC_CLR_RX_OVER 0x48
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#define DW_IC_CLR_TX_OVER 0x4c
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#define DW_IC_CLR_RD_REQ 0x50
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#define DW_IC_CLR_TX_ABRT 0x54
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#define DW_IC_CLR_RX_DONE 0x58
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#define DW_IC_CLR_ACTIVITY 0x5c
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#define DW_IC_CLR_STOP_DET 0x60
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#define DW_IC_CLR_START_DET 0x64
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#define DW_IC_CLR_GEN_CALL 0x68
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#define DW_IC_ENABLE 0x6c
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#define DW_IC_STATUS 0x70
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#define DW_IC_TXFLR 0x74
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#define DW_IC_RXFLR 0x78
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#define DW_IC_SDA_HOLD 0x7c
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#define DW_IC_TX_ABRT_SOURCE 0x80
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#define DW_IC_ENABLE_STATUS 0x9c
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#define DW_IC_CLR_RESTART_DET 0xa8
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#define DW_IC_COMP_PARAM_1 0xf4
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#define DW_IC_COMP_VERSION 0xf8
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#define DW_I2C_STATUS_TXFIFO_EMPTY BIT(2)
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#define DW_I2C_STATUS_RXFIFO_NOT_EMPTY BIT(3)
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#define IC_DATA_CMD_READ BIT(8)
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#define IC_DATA_CMD_STOP BIT(9)
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#define IC_DATA_CMD_RESTART BIT(10)
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#define IC_INT_STATUS_STOPDET BIT(9)
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static inline void dw_i2c_setreg(struct dw_i2c_adapter *adap,
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u8 reg, u32 value)
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{
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writel(value, (void *)adap->addr + reg);
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}
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static inline u32 dw_i2c_getreg(struct dw_i2c_adapter *adap,
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u32 reg)
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{
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return readl((void *)adap->addr + reg);
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}
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static int dw_i2c_adapter_poll(struct dw_i2c_adapter *adap,
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u32 mask, u32 addr,
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bool inverted)
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{
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unsigned int timeout = 10; /* msec */
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int count = 0;
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u32 val;
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do {
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val = dw_i2c_getreg(adap, addr);
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if (inverted) {
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if (!(val & mask))
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return 0;
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} else {
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if (val & mask)
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return 0;
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}
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sbi_timer_udelay(2);
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count += 1;
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if (count == (timeout * 1000))
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return SBI_ETIMEDOUT;
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} while (1);
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}
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#define dw_i2c_adapter_poll_rxrdy(adap) \
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dw_i2c_adapter_poll(adap, DW_I2C_STATUS_RXFIFO_NOT_EMPTY, DW_IC_STATUS, 0)
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#define dw_i2c_adapter_poll_txfifo_ready(adap) \
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dw_i2c_adapter_poll(adap, DW_I2C_STATUS_TXFIFO_EMPTY, DW_IC_STATUS, 0)
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static int dw_i2c_write_addr(struct dw_i2c_adapter *adap, u8 addr)
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{
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dw_i2c_setreg(adap, DW_IC_ENABLE, 0);
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dw_i2c_setreg(adap, DW_IC_TAR, addr);
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dw_i2c_setreg(adap, DW_IC_ENABLE, 1);
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return 0;
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}
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static int dw_i2c_adapter_read(struct i2c_adapter *ia, u8 addr,
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u8 reg, u8 *buffer, int len)
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{
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struct dw_i2c_adapter *adap =
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container_of(ia, struct dw_i2c_adapter, adapter);
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int rc;
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dw_i2c_write_addr(adap, addr);
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rc = dw_i2c_adapter_poll_txfifo_ready(adap);
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if (rc)
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return rc;
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/* set register address */
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dw_i2c_setreg(adap, DW_IC_DATA_CMD, reg);
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/* set value */
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while (len) {
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if (len == 1)
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dw_i2c_setreg(adap, DW_IC_DATA_CMD,
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IC_DATA_CMD_READ | IC_DATA_CMD_STOP);
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else
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dw_i2c_setreg(adap, DW_IC_DATA_CMD, IC_DATA_CMD_READ);
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rc = dw_i2c_adapter_poll_rxrdy(adap);
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if (rc)
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return rc;
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*buffer = dw_i2c_getreg(adap, DW_IC_DATA_CMD) & 0xff;
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buffer++;
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len--;
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}
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return 0;
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}
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static int dw_i2c_adapter_write(struct i2c_adapter *ia, u8 addr,
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u8 reg, u8 *buffer, int len)
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{
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struct dw_i2c_adapter *adap =
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container_of(ia, struct dw_i2c_adapter, adapter);
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int rc;
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dw_i2c_write_addr(adap, addr);
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rc = dw_i2c_adapter_poll_txfifo_ready(adap);
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if (rc)
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return rc;
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/* set register address */
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dw_i2c_setreg(adap, DW_IC_DATA_CMD, reg);
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while (len) {
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rc = dw_i2c_adapter_poll_txfifo_ready(adap);
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if (rc)
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return rc;
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if (len == 1)
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dw_i2c_setreg(adap, DW_IC_DATA_CMD, *buffer | IC_DATA_CMD_STOP);
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else
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dw_i2c_setreg(adap, DW_IC_DATA_CMD, *buffer);
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buffer++;
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len--;
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}
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rc = dw_i2c_adapter_poll_txfifo_ready(adap);
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return rc;
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}
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int dw_i2c_init(struct i2c_adapter *adapter, int nodeoff)
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{
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adapter->id = nodeoff;
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adapter->write = dw_i2c_adapter_write;
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adapter->read = dw_i2c_adapter_read;
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return i2c_adapter_add(adapter);
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}
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