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RISC-V Open Source Supervisor Binary Interface
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Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
2018-12-20 14:41:36 +09:00
blob blob: payload: Add FW_PAYLOAD_FDT_PATH option 2018-12-19 18:32:49 +05:30
include/sbi Initial commit. 2018-12-11 19:24:06 +05:30
lib lib: Don't emulate CSR read for misa and mhartid 2018-12-16 10:15:55 +05:30
plat blob: Rename FW_xyz_FDT_OFFSET to FW_xyz_FDT_ADDR 2018-12-19 15:47:52 +05:30
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README.md Initial commit. 2018-12-11 19:24:06 +05:30

README.md

RISC-V Open Source Supervisor Binary Interface (OpenSBI)

The RISC-V Supervisor Binary Interface (SBI) is a recommended interface between:

  1. platform specific firmware running in M-mode and bootloader running in S-mode
  2. platform specific firmware running in M-mode and general purpose operating system running in S-mode
  3. hypervisor runnng in HS-mode and general purpose operating system running in VS-mode.

The RISC-V SBI spec is maintained as independent project by RISC-V Foundation at https://github.com/riscv/riscv-sbi-doc

The RISC-V OpenSBI project aims to provides an open-source and extensible implementation of the SBI spec. This project can be easily extended by RISC-V platform or RISC-V System-on-Chip vendors.

How to Build?

Below are the steps to cross-compile and install RISC-V OpenSBI:

  1. Setup build environment $ CROSS_COMPILE=riscv64-unknown-linux-gnu-

  2. Build sources $ make PLAT=<platform_name> OR $ make PLAT=<platform_name> O=<build_directory>

  3. Install blobs $ make PLAT=<platform_name> install OR $ make PLAT=<platform_name> I=<install_directory> install