mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-18 13:11:31 +00:00
Merge remote branch 'origin/master' into next
This commit is contained in:
commit
0020db3f0d
21 changed files with 195 additions and 1760 deletions
100
CHANGELOG
100
CHANGELOG
|
@ -1,3 +1,103 @@
|
|||
commit 060f28532b09dd3d2c78423bdd809ac768a27629
|
||||
Author: Wolfgang Denk <wd@denx.de>
|
||||
Date: Thu Mar 25 14:07:23 2010 +0100
|
||||
|
||||
cmd_usb.c: print debug messages only when DEBUG is defined
|
||||
|
||||
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
||||
|
||||
commit a574cff121b1479c8e962b7a2a29310020387260
|
||||
Author: Wolfgang Denk <wd@denx.de>
|
||||
Date: Wed Mar 24 12:19:19 2010 +0100
|
||||
|
||||
ml300: remove support for broken, orphaned board
|
||||
|
||||
The ml300 board has a number of issues, but nobody cares about this
|
||||
long-orphaned board any more. Remove it.
|
||||
|
||||
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
||||
Acked-by: Michal Simek <monstr@monstr.eu>
|
||||
|
||||
commit 04387d24a17b1ee13024dd4779da4b84d47c65cc
|
||||
Author: Wolfgang Denk <wd@denx.de>
|
||||
Date: Sat Mar 27 23:37:46 2010 +0100
|
||||
|
||||
mkimage: fix Segmentation Fault when run without "-n name" option
|
||||
|
||||
The restructuring of the mkimage command in commit 89a4d6b1 ("tools:
|
||||
mkimage: split code into core, default and FIT image specific")
|
||||
introduced a bug that caused mkimage to segfault when run without
|
||||
"-n name" option. Initialize the imagename entry to prevent that.
|
||||
|
||||
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
||||
|
||||
commit c40c94a3d20a8616264c2dfcda85279185d69aeb
|
||||
Author: Renato Andreola <renato.andreola@imagos.it>
|
||||
Date: Wed Mar 24 23:00:47 2010 +0800
|
||||
|
||||
cfi_flash: precision and underflow problem in tout calculation
|
||||
|
||||
With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000.
|
||||
|
||||
Signed-off-by: Renato Andreola <renato.andreola@imagos.it>
|
||||
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
|
||||
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
|
||||
Signed-off-by: Stefan Roese <sr@denx.de>
|
||||
|
||||
commit c550afada5fcad426aa6a219a329feb9eedae8b2
|
||||
Author: Rupjyoti Sarmah <rsarmah@appliedmicro.com>
|
||||
Date: Wed Mar 24 16:52:02 2010 +0530
|
||||
|
||||
ppc4xx fix unstable 440EPx bootstrap options
|
||||
|
||||
440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
|
||||
This results in the PLLOUTB being greater than the CPU clock frequency
|
||||
resulting unstable 440EPx operation resulting in various software hang
|
||||
conditions.
|
||||
|
||||
This patch reprograms the FWDVA satisfying the requirement of setting FWDVB
|
||||
to a value greater than 1 while using one of the four deafult bootstrap options.
|
||||
|
||||
Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
|
||||
Acked-by : Victor Gallardo <vgallardo@appliedmicro.com>
|
||||
Signed-off-by: Stefan Roese <sr@denx.de>
|
||||
|
||||
commit fb508b8b39a52a4063d098f5a9b4355bc5b30c14
|
||||
Author: Matthias Fuchs <matthias.fuchs@esd.eu>
|
||||
Date: Wed Mar 24 10:16:20 2010 +0100
|
||||
|
||||
at91: Get rid of some warnings when building for otc570
|
||||
|
||||
The soft-i2c code for AT91 defines I2C_SOFT_DECLARATIONS
|
||||
for direct access by dereferencing a pio pointer.
|
||||
The OTC570 platform uses the AT91 gpio API so it does not
|
||||
need the pio variable.
|
||||
|
||||
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
|
||||
|
||||
commit acb13868936a28502782a16e1edaec378e494a29
|
||||
Author: Alessandro Rubini <rubini@unipv.it>
|
||||
Date: Sat Mar 13 17:44:08 2010 +0100
|
||||
|
||||
lcd: make 16bpp work
|
||||
|
||||
Support for 16bpp was supposed to be in the code but was not working.
|
||||
This makes it work and has been tested in the nhk8815 board.
|
||||
|
||||
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
|
||||
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
|
||||
Signed-off-by: Anatolij Gustschin <agust@denx.de>
|
||||
|
||||
commit 152dda3d94e97ede7af3f9560a59a659384d4585
|
||||
Author: Wolfgang Denk <wd@denx.de>
|
||||
Date: Mon Mar 22 23:25:00 2010 +0100
|
||||
|
||||
Prepare v2010.03-rc2
|
||||
|
||||
Update CHANGELOG
|
||||
|
||||
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
||||
|
||||
commit d650da2dd4af99967aabc43cccbd8f160eb4cea6
|
||||
Author: Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
Date: Tue Mar 9 22:13:33 2010 +0100
|
||||
|
|
1
MAKEALL
1
MAKEALL
|
@ -236,7 +236,6 @@ LIST_4xx=" \
|
|||
MIP405 \
|
||||
MIP405T \
|
||||
ML2 \
|
||||
ml300 \
|
||||
ml507 \
|
||||
ml507_flash \
|
||||
neo \
|
||||
|
|
5
Makefile
5
Makefile
|
@ -24,7 +24,7 @@
|
|||
VERSION = 2010
|
||||
PATCHLEVEL = 03
|
||||
SUBLEVEL =
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc3
|
||||
ifneq "$(SUBLEVEL)" ""
|
||||
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
|
||||
else
|
||||
|
@ -1415,9 +1415,6 @@ MIP405T_config: unconfig
|
|||
ML2_config: unconfig
|
||||
@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml2
|
||||
|
||||
ml300_config: unconfig
|
||||
@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx
|
||||
|
||||
ml507_flash_config: unconfig
|
||||
@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
|
||||
@mkdir -p $(obj)include $(obj)board/xilinx/ml507
|
||||
|
|
|
@ -1,70 +0,0 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
ifneq ($(OBJTREE),$(SRCTREE))
|
||||
$(shell mkdir -p $(obj)../common)
|
||||
$(shell mkdir -p $(obj)../xilinx_enet)
|
||||
$(shell mkdir -p $(obj)../xilinx_iic)
|
||||
endif
|
||||
|
||||
INCS := -I../common -I../xilinx_enet -I../xilinx_iic
|
||||
CFLAGS += $(INCS)
|
||||
HOSTCFLAGS += $(INCS)
|
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS = $(BOARD).o \
|
||||
serial.o \
|
||||
../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \
|
||||
../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
|
||||
../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
|
||||
../xilinx_enet/xemac_intr_dma.o ../xilinx_iic/iic_adapter.o \
|
||||
../xilinx_iic/xiic_l.o ../common/xipif_v1_23_b.o \
|
||||
../common/xbasic_types.o ../common/xdma_channel.o \
|
||||
../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
|
||||
../common/xversion.o \
|
||||
|
||||
SOBJS = init.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) $(ARFLAGS) $@ $^
|
||||
|
||||
clean:
|
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean
|
||||
rm -f $(LIB) core *.bak $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
|
@ -1,32 +0,0 @@
|
|||
#
|
||||
# (C) Copyright 2000
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
#
|
||||
# esd ADCIOP boards
|
||||
#
|
||||
|
||||
#TEXT_BASE = 0xFFFE0000
|
||||
TEXT_BASE = 0x04000000
|
||||
|
||||
# Use board specific linker script
|
||||
LDSCRIPT := $(SRCTREE)/board/xilinx/ml300/u-boot.lds
|
|
@ -1,44 +0,0 @@
|
|||
/*
|
||||
* init.S: Stubs for U-Boot initialization
|
||||
*
|
||||
* Author: Xilinx, Inc.
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*
|
||||
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
|
||||
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
|
||||
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
|
||||
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
|
||||
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
|
||||
* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
|
||||
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
|
||||
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
|
||||
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
|
||||
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
|
||||
* FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
*
|
||||
* Xilinx hardware products are not intended for use in life support
|
||||
* appliances, devices, or systems. Use in such applications is
|
||||
* expressly prohibited.
|
||||
*
|
||||
*
|
||||
* (c) Copyright 2002-2004 Xilinx Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
.globl ext_bus_cntlr_init
|
||||
ext_bus_cntlr_init:
|
||||
blr
|
|
@ -1,128 +0,0 @@
|
|||
/*
|
||||
* ml300.c: U-Boot platform support for Xilinx ML300 board
|
||||
*
|
||||
* Author: Xilinx, Inc.
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*
|
||||
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
|
||||
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
|
||||
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
|
||||
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
|
||||
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
|
||||
* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
|
||||
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
|
||||
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
|
||||
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
|
||||
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
|
||||
* FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
*
|
||||
* Xilinx hardware products are not intended for use in life support
|
||||
* appliances, devices, or systems. Use in such applications is
|
||||
* expressly prohibited.
|
||||
*
|
||||
*
|
||||
* (c) Copyright 2002-2004 Xilinx Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
#ifdef CONFIG_ENV_IS_IN_EEPROM
|
||||
extern void convert_env(void);
|
||||
#endif
|
||||
|
||||
int
|
||||
board_pre_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
checkboard(void)
|
||||
{
|
||||
char tmp[64]; /* long enough for environment variables */
|
||||
char *s, *e;
|
||||
int i = getenv_r("L", tmp, sizeof (tmp));
|
||||
|
||||
if (i < 0) {
|
||||
printf("### No HW ID - assuming ML300");
|
||||
} else {
|
||||
for (e = tmp; *e; ++e) {
|
||||
if (*e == ' ')
|
||||
break;
|
||||
}
|
||||
|
||||
printf("### Board Serial# is ");
|
||||
|
||||
for (s = tmp; s < e; ++s) {
|
||||
putc(*s);
|
||||
}
|
||||
|
||||
}
|
||||
putc('\n');
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
phys_size_t
|
||||
initdram(int board_type)
|
||||
{
|
||||
return 128 * 1024 * 1024;
|
||||
}
|
||||
|
||||
int
|
||||
testdram(void)
|
||||
{
|
||||
printf("test: xxx MB - ok\n");
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* implement functions originally in cpu/ppc4xx/speed.c */
|
||||
void
|
||||
get_sys_info(sys_info_t * sysInfo)
|
||||
{
|
||||
sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
|
||||
|
||||
/* only correct if the PLB and OPB run at the same frequency */
|
||||
sysInfo->freqPLB = XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
|
||||
sysInfo->freqPCI = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 3;
|
||||
}
|
||||
|
||||
ulong
|
||||
get_PCI_freq(void)
|
||||
{
|
||||
ulong val;
|
||||
PPC4xx_SYS_INFO sys_info;
|
||||
|
||||
get_sys_info(&sys_info);
|
||||
val = sys_info.freqPCI;
|
||||
return val;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MISC_INIT_R
|
||||
|
||||
int
|
||||
misc_init_r()
|
||||
{
|
||||
/* convert env name and value to u-boot standard */
|
||||
convert_env();
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
|
@ -1,154 +0,0 @@
|
|||
/*
|
||||
* Author: Xilinx, Inc.
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*
|
||||
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
|
||||
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
|
||||
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
|
||||
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
|
||||
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
|
||||
* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
|
||||
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
|
||||
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
|
||||
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
|
||||
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
|
||||
* FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
*
|
||||
* Xilinx hardware products are not intended for use in life support
|
||||
* appliances, devices, or systems. Use in such applications is
|
||||
* expressly prohibited.
|
||||
*
|
||||
*
|
||||
* (c) Copyright 2002-2004 Xilinx Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/u-boot.h>
|
||||
#include <asm/processor.h>
|
||||
#include <command.h>
|
||||
#include <config.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define USE_CHAN1 \
|
||||
((defined XPAR_UARTNS550_0_BASEADDR) && (defined CONFIG_SYS_INIT_CHAN1))
|
||||
#define USE_CHAN2 \
|
||||
((defined XPAR_UARTNS550_1_BASEADDR) && (defined CONFIG_SYS_INIT_CHAN2))
|
||||
|
||||
#if USE_CHAN1
|
||||
#include <ns16550.h>
|
||||
#endif
|
||||
|
||||
#if USE_CHAN1
|
||||
const NS16550_t COM_PORTS[] = { (NS16550_t) (XPAR_UARTNS550_0_BASEADDR + 3)
|
||||
#if USE_CHAN2
|
||||
, (NS16550_t) (XPAR_UARTNS550_1_BASEADDR + 3)
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
int
|
||||
serial_init(void)
|
||||
{
|
||||
#if USE_CHAN1
|
||||
int clock_divisor;
|
||||
|
||||
clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
|
||||
(void) NS16550_init(COM_PORTS[0], clock_divisor);
|
||||
#if USE_CHAN2
|
||||
clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
|
||||
(void) NS16550_init(COM_PORTS[1], clock_divisor);
|
||||
#endif
|
||||
#endif
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
void
|
||||
serial_putc(const char c)
|
||||
{
|
||||
if (c == '\n')
|
||||
NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], '\r');
|
||||
|
||||
NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], c);
|
||||
}
|
||||
|
||||
int
|
||||
serial_getc(void)
|
||||
{
|
||||
return NS16550_getc(COM_PORTS[CONFIG_SYS_DUART_CHAN]);
|
||||
}
|
||||
|
||||
int
|
||||
serial_tstc(void)
|
||||
{
|
||||
return NS16550_tstc(COM_PORTS[CONFIG_SYS_DUART_CHAN]);
|
||||
}
|
||||
|
||||
void
|
||||
serial_setbrg(void)
|
||||
{
|
||||
#if USE_CHAN1
|
||||
int clock_divisor;
|
||||
|
||||
clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
|
||||
NS16550_reinit(COM_PORTS[0], clock_divisor);
|
||||
#if USE_CHAN2
|
||||
clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
|
||||
NS16550_reinit(COM_PORTS[1], clock_divisor);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
serial_puts(const char *s)
|
||||
{
|
||||
while (*s) {
|
||||
serial_putc(*s++);
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_CMD_KGDB)
|
||||
void
|
||||
kgdb_serial_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
void
|
||||
putDebugChar(int c)
|
||||
{
|
||||
serial_putc(c);
|
||||
}
|
||||
|
||||
void
|
||||
putDebugStr(const char *str)
|
||||
{
|
||||
serial_puts(str);
|
||||
}
|
||||
|
||||
int
|
||||
getDebugChar(void)
|
||||
{
|
||||
return serial_getc();
|
||||
}
|
||||
|
||||
void
|
||||
kgdb_interruptible(int yes)
|
||||
{
|
||||
return;
|
||||
}
|
||||
#endif
|
|
@ -1,146 +0,0 @@
|
|||
/*
|
||||
* (C) Copyright 2000
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(powerpc)
|
||||
ENTRY(_start)
|
||||
/* Do we need any of these for elf?
|
||||
__DYNAMIC = 0; */
|
||||
SECTIONS
|
||||
{
|
||||
/* Read-only sections, merged into text segment: */
|
||||
. = + SIZEOF_HEADERS;
|
||||
.interp : { *(.interp) }
|
||||
.hash : { *(.hash) }
|
||||
.dynsym : { *(.dynsym) }
|
||||
.dynstr : { *(.dynstr) }
|
||||
.rel.text : { *(.rel.text) }
|
||||
.rela.text : { *(.rela.text) }
|
||||
.rel.data : { *(.rel.data) }
|
||||
.rela.data : { *(.rela.data) }
|
||||
.rel.rodata : { *(.rel.rodata) }
|
||||
.rela.rodata : { *(.rela.rodata) }
|
||||
.rel.got : { *(.rel.got) }
|
||||
.rela.got : { *(.rela.got) }
|
||||
.rel.ctors : { *(.rel.ctors) }
|
||||
.rela.ctors : { *(.rela.ctors) }
|
||||
.rel.dtors : { *(.rel.dtors) }
|
||||
.rela.dtors : { *(.rela.dtors) }
|
||||
.rel.bss : { *(.rel.bss) }
|
||||
.rela.bss : { *(.rela.bss) }
|
||||
.rel.plt : { *(.rel.plt) }
|
||||
.rela.plt : { *(.rela.plt) }
|
||||
.init : { *(.init) }
|
||||
.plt : { *(.plt) }
|
||||
.text :
|
||||
{
|
||||
/* WARNING - the following is hand-optimized to fit within */
|
||||
/* the sector layout of our flash chips! XXX FIXME XXX */
|
||||
/*
|
||||
cpu/ppc4xx/start.o (.text)
|
||||
board/xilinx/ml300/init.o (.text)
|
||||
cpu/ppc4xx/kgdb.o (.text)
|
||||
cpu/ppc4xx/traps.o (.text)
|
||||
cpu/ppc4xx/interrupts.o (.text)
|
||||
cpu/ppc4xx/4xx_uart.o (.text)
|
||||
cpu/ppc4xx/cpu_init.o (.text)
|
||||
cpu/ppc4xx/speed.o (.text)
|
||||
drivers/net/4xx_enet.o (.text)
|
||||
common/dlmalloc.o (.text)
|
||||
lib_generic/crc32.o (.text)
|
||||
lib_ppc/extable.o (.text)
|
||||
lib_generic/zlib.o (.text)
|
||||
*/
|
||||
/* . = env_offset;*/
|
||||
/* common/env_embedded.o(.text)*/
|
||||
|
||||
*(.text)
|
||||
*(.got1)
|
||||
}
|
||||
_etext = .;
|
||||
PROVIDE (etext = .);
|
||||
.rodata :
|
||||
{
|
||||
*(.eh_frame)
|
||||
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
|
||||
}
|
||||
.fini : { *(.fini) } =0
|
||||
.ctors : { *(.ctors) }
|
||||
.dtors : { *(.dtors) }
|
||||
|
||||
/* Read-write section, merged into data segment: */
|
||||
. = (. + 0x00FF) & 0xFFFFFF00;
|
||||
_erotext = .;
|
||||
PROVIDE (erotext = .);
|
||||
.reloc :
|
||||
{
|
||||
*(.got)
|
||||
_GOT2_TABLE_ = .;
|
||||
*(.got2)
|
||||
_FIXUP_TABLE_ = .;
|
||||
*(.fixup)
|
||||
}
|
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
|
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata2)
|
||||
*(.dynamic)
|
||||
CONSTRUCTORS
|
||||
}
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
|
||||
. = .;
|
||||
__start___ex_table = .;
|
||||
__ex_table : { *(__ex_table) }
|
||||
__stop___ex_table = .;
|
||||
|
||||
. = ALIGN(256);
|
||||
__init_begin = .;
|
||||
.text.init : { *(.text.init) }
|
||||
.data.init : { *(.data.init) }
|
||||
. = ALIGN(256);
|
||||
__init_end = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
*(.sbss) *(.scommon)
|
||||
*(.dynbss)
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
_end = . ;
|
||||
PROVIDE (end = .);
|
||||
}
|
|
@ -1,135 +0,0 @@
|
|||
/*
|
||||
* (C) Copyright 2000
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(powerpc)
|
||||
/* Do we need any of these for elf?
|
||||
__DYNAMIC = 0; */
|
||||
SECTIONS
|
||||
{
|
||||
/* Read-only sections, merged into text segment: */
|
||||
. = + SIZEOF_HEADERS;
|
||||
.interp : { *(.interp) }
|
||||
.hash : { *(.hash) }
|
||||
.dynsym : { *(.dynsym) }
|
||||
.dynstr : { *(.dynstr) }
|
||||
.rel.text : { *(.rel.text) }
|
||||
.rela.text : { *(.rela.text) }
|
||||
.rel.data : { *(.rel.data) }
|
||||
.rela.data : { *(.rela.data) }
|
||||
.rel.rodata : { *(.rel.rodata) }
|
||||
.rela.rodata : { *(.rela.rodata) }
|
||||
.rel.got : { *(.rel.got) }
|
||||
.rela.got : { *(.rela.got) }
|
||||
.rel.ctors : { *(.rel.ctors) }
|
||||
.rela.ctors : { *(.rela.ctors) }
|
||||
.rel.dtors : { *(.rel.dtors) }
|
||||
.rela.dtors : { *(.rela.dtors) }
|
||||
.rel.bss : { *(.rel.bss) }
|
||||
.rela.bss : { *(.rela.bss) }
|
||||
.rel.plt : { *(.rel.plt) }
|
||||
.rela.plt : { *(.rela.plt) }
|
||||
.init : { *(.init) }
|
||||
.plt : { *(.plt) }
|
||||
.text :
|
||||
{
|
||||
/* WARNING - the following is hand-optimized to fit within */
|
||||
/* the sector layout of our flash chips! XXX FIXME XXX */
|
||||
|
||||
mpc8xx/start.o (.text)
|
||||
common/dlmalloc.o (.text)
|
||||
lib_generic/vsprintf.o (.text)
|
||||
lib_generic/crc32.o (.text)
|
||||
lib_ppc/extable.o (.text)
|
||||
|
||||
common/env_embedded.o(.text)
|
||||
|
||||
*(.text)
|
||||
*(.got1)
|
||||
}
|
||||
_etext = .;
|
||||
PROVIDE (etext = .);
|
||||
.rodata :
|
||||
{
|
||||
*(.rodata)
|
||||
*(.rodata1)
|
||||
*(.rodata.str1.4)
|
||||
*(.eh_frame)
|
||||
}
|
||||
.fini : { *(.fini) } =0
|
||||
.ctors : { *(.ctors) }
|
||||
.dtors : { *(.dtors) }
|
||||
|
||||
/* Read-write section, merged into data segment: */
|
||||
. = (. + 0x0FFF) & 0xFFFFF000;
|
||||
_erotext = .;
|
||||
PROVIDE (erotext = .);
|
||||
.reloc :
|
||||
{
|
||||
*(.got)
|
||||
_GOT2_TABLE_ = .;
|
||||
*(.got2)
|
||||
_FIXUP_TABLE_ = .;
|
||||
*(.fixup)
|
||||
}
|
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
|
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata2)
|
||||
*(.dynamic)
|
||||
CONSTRUCTORS
|
||||
}
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
|
||||
__start___ex_table = .;
|
||||
__ex_table : { *(__ex_table) }
|
||||
__stop___ex_table = .;
|
||||
|
||||
. = ALIGN(4096);
|
||||
__init_begin = .;
|
||||
.text.init : { *(.text.init) }
|
||||
.data.init : { *(.data.init) }
|
||||
. = ALIGN(4096);
|
||||
__init_end = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.sbss) *(.scommon)
|
||||
*(.dynbss)
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
}
|
||||
_end = . ;
|
||||
PROVIDE (end = .);
|
||||
}
|
|
@ -1,196 +0,0 @@
|
|||
/*******************************************************************
|
||||
*
|
||||
* CAUTION: This file is automatically generated by libgen.
|
||||
* Version: Xilinx EDK 6.2 EDK_Gm.11
|
||||
* DO NOT EDIT.
|
||||
*
|
||||
* Copyright (c) 2003 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Description: Driver parameters
|
||||
*
|
||||
*******************************************************************/
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
/* U-Boot Redefines */
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000)
|
||||
#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR
|
||||
#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
|
||||
#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID
|
||||
#define XPAR_UARTNS550_1_BASEADDR (XPAR_OPB_UART16550_1_BASEADDR+0x1000)
|
||||
#define XPAR_UARTNS550_1_HIGHADDR XPAR_OPB_UART16550_1_HIGHADDR
|
||||
#define XPAR_UARTNS550_1_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
|
||||
#define XPAR_UARTNS550_1_DEVICE_ID XPAR_OPB_UART16550_1_DEVICE_ID
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR
|
||||
#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR
|
||||
#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR
|
||||
#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR
|
||||
#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR
|
||||
#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT
|
||||
#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST
|
||||
#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST
|
||||
#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400
|
||||
#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF
|
||||
#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XPCI_NUM_INSTANCES 1
|
||||
#define XPAR_XPCI_CLOCK_HZ 33333333
|
||||
#define XPAR_OPB_PCI_REF_0_DEVICE_ID 0
|
||||
#define XPAR_OPB_PCI_REF_0_BASEADDR 0x20000000
|
||||
#define XPAR_OPB_PCI_REF_0_HIGHADDR 0x3FFFFFFF
|
||||
#define XPAR_OPB_PCI_REF_0_CONFIG_ADDR 0x3C000000
|
||||
#define XPAR_OPB_PCI_REF_0_CONFIG_DATA 0x3C000004
|
||||
#define XPAR_OPB_PCI_REF_0_LCONFIG_ADDR 0x3E000000
|
||||
#define XPAR_OPB_PCI_REF_0_MEM_BASEADDR 0x20000000
|
||||
#define XPAR_OPB_PCI_REF_0_MEM_HIGHADDR 0x37FFFFFF
|
||||
#define XPAR_OPB_PCI_REF_0_IO_BASEADDR 0x38000000
|
||||
#define XPAR_OPB_PCI_REF_0_IO_HIGHADDR 0x3BFFFFFF
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XEMAC_NUM_INSTANCES 1
|
||||
#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
|
||||
#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
|
||||
#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
|
||||
#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
|
||||
#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
|
||||
#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_0 0
|
||||
#define XPAR_MY_OPB_GPIO_0_BASEADDR_0 0x90000000
|
||||
#define XPAR_MY_OPB_GPIO_0_HIGHADDR_0 (0x90000000+0x7)
|
||||
#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_1 1
|
||||
#define XPAR_MY_OPB_GPIO_0_BASEADDR_1 (0x90000000+0x8)
|
||||
#define XPAR_MY_OPB_GPIO_0_HIGHADDR_1 (0x90000000+0x1F)
|
||||
#define XPAR_XGPIO_NUM_INSTANCES 2
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XIIC_NUM_INSTANCES 1
|
||||
#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000
|
||||
#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF
|
||||
#define XPAR_OPB_IIC_0_DEVICE_ID 0
|
||||
#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XUARTNS550_NUM_INSTANCES 2
|
||||
#define XPAR_XUARTNS550_CLOCK_HZ 100000000
|
||||
#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000
|
||||
#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF
|
||||
#define XPAR_OPB_UART16550_0_DEVICE_ID 0
|
||||
#define XPAR_OPB_UART16550_1_BASEADDR 0xA0010000
|
||||
#define XPAR_OPB_UART16550_1_HIGHADDR 0xA0011FFF
|
||||
#define XPAR_OPB_UART16550_1_DEVICE_ID 1
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XSPI_NUM_INSTANCES 1
|
||||
#define XPAR_OPB_SPI_0_BASEADDR 0xA4000000
|
||||
#define XPAR_OPB_SPI_0_HIGHADDR 0xA400007F
|
||||
#define XPAR_OPB_SPI_0_DEVICE_ID 0
|
||||
#define XPAR_OPB_SPI_0_FIFO_EXIST 1
|
||||
#define XPAR_OPB_SPI_0_SPI_SLAVE_ONLY 0
|
||||
#define XPAR_OPB_SPI_0_NUM_SS_BITS 1
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XPS2_NUM_INSTANCES 2
|
||||
#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0
|
||||
#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000
|
||||
#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F)
|
||||
#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1
|
||||
#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000)
|
||||
#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F)
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XTOUCHSCREEN_NUM_INSTANCES 1
|
||||
#define XPAR_OPB_TSD_REF_0_BASEADDR 0xAA000000
|
||||
#define XPAR_OPB_TSD_REF_0_HIGHADDR 0xAA000007
|
||||
#define XPAR_OPB_TSD_REF_0_DEVICE_ID 0
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000
|
||||
#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF
|
||||
#define XPAR_OPB_PAR_PORT_REF_0_BASEADDR 0x90010000
|
||||
#define XPAR_OPB_PAR_PORT_REF_0_HIGHADDR 0x900100FF
|
||||
#define XPAR_PLB_DDR_0_BASEADDR 0x00000000
|
||||
#define XPAR_PLB_DDR_0_HIGHADDR 0x0FFFFFFF
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XINTC_HAS_IPR 1
|
||||
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 18
|
||||
#define XPAR_XINTC_USE_DCR 0
|
||||
#define XPAR_XINTC_NUM_INSTANCES 1
|
||||
#define XPAR_DCR_INTC_0_BASEADDR 0xD0000FC0
|
||||
#define XPAR_DCR_INTC_0_HIGHADDR 0xD0000FDF
|
||||
#define XPAR_DCR_INTC_0_DEVICE_ID 0
|
||||
#define XPAR_DCR_INTC_0_KIND_OF_INTR 0x00038000
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_DCR_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 0
|
||||
#define XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 1
|
||||
#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_TEMP_CRIT_INTR 2
|
||||
#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_IRQ_INTR 3
|
||||
#define XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 4
|
||||
#define XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 5
|
||||
#define XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 6
|
||||
#define XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR 7
|
||||
#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8
|
||||
#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 9
|
||||
#define XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR 10
|
||||
#define XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR 11
|
||||
#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 12
|
||||
#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 13
|
||||
#define XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR 14
|
||||
#define XPAR_DCR_INTC_0_PLB2OPB_BRIDGE_0_BUS_ERROR_DET_INTR 15
|
||||
#define XPAR_DCR_INTC_0_PLB_V34_0_BUS_ERROR_DET_INTR 16
|
||||
#define XPAR_DCR_INTC_0_OPB2PLB_BRIDGE_0_BUS_ERROR_DET_INTR 17
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XTFT_NUM_INSTANCES 1
|
||||
#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200
|
||||
#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207
|
||||
#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_XSYSACE_MEM_WIDTH 8
|
||||
#define XPAR_XSYSACE_NUM_INSTANCES 1
|
||||
#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000
|
||||
#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF
|
||||
#define XPAR_OPB_SYSACE_0_DEVICE_ID 0
|
||||
#define XPAR_OPB_SYSACE_0_MEM_WIDTH 8
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000
|
||||
|
||||
/******************************************************************/
|
|
@ -1,529 +0,0 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Author: Xilinx, Inc.
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*
|
||||
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
|
||||
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
|
||||
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
|
||||
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
|
||||
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
|
||||
* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
|
||||
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
|
||||
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
|
||||
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
|
||||
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
|
||||
* FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
*
|
||||
* Xilinx hardware products are not intended for use in life support
|
||||
* appliances, devices, or systems. Use in such applications is
|
||||
* expressly prohibited.
|
||||
*
|
||||
*
|
||||
* (c) Copyright 2002-2004 Xilinx Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <environment.h>
|
||||
#include <net.h>
|
||||
|
||||
#ifdef CONFIG_ENV_IS_IN_EEPROM
|
||||
#include <i2c.h>
|
||||
#include "xiic_l.h"
|
||||
|
||||
#define IIC_DELAY 5000
|
||||
|
||||
static u8 envStep = 0; /* 0 means crc has not been read */
|
||||
const u8 hex[] = "0123456789ABCDEF"; /* lookup table for ML300 CRC */
|
||||
|
||||
/************************************************************************
|
||||
* Use Xilinx provided driver to send data to EEPROM using iic bus.
|
||||
*/
|
||||
static void
|
||||
send(u32 adr, u8 * data, u32 len)
|
||||
{
|
||||
u8 sendBuf[34]; /* first 2-bit is address and others are data */
|
||||
u32 pos, wlen;
|
||||
u32 ret;
|
||||
|
||||
wlen = 32;
|
||||
for (pos = 0; pos < len; pos += 32) {
|
||||
if ((len - pos) < 32)
|
||||
wlen = len - pos;
|
||||
|
||||
/* Put address and data bits together */
|
||||
sendBuf[0] = (u8) ((adr + pos) >> 8);
|
||||
sendBuf[1] = (u8) (adr + pos);
|
||||
memcpy(&sendBuf[2], &data[pos], wlen);
|
||||
|
||||
/* Send to EEPROM through iic bus */
|
||||
ret = XIic_Send(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1,
|
||||
sendBuf, wlen + 2);
|
||||
|
||||
udelay(IIC_DELAY);
|
||||
}
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Use Xilinx provided driver to read data from EEPROM using the iic bus.
|
||||
*/
|
||||
static void
|
||||
receive(u32 adr, u8 * data, u32 len)
|
||||
{
|
||||
u8 address[2];
|
||||
u32 ret;
|
||||
|
||||
address[0] = (u8) (adr >> 8);
|
||||
address[1] = (u8) adr;
|
||||
|
||||
/* Provide EEPROM address */
|
||||
ret =
|
||||
XIic_Send(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1, address,
|
||||
2);
|
||||
/* Receive data from EEPROM */
|
||||
ret =
|
||||
XIic_Recv(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1, data, len);
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Convert a hexadecimal string to its equivalent integer value.
|
||||
*/
|
||||
static u8
|
||||
axtoi(u8 * hexStg)
|
||||
{
|
||||
u8 n; /* position in string */
|
||||
u8 m; /* position in digit[] to shift */
|
||||
u8 count; /* loop index */
|
||||
u8 intValue; /* integer value of hex string */
|
||||
u8 digit[2]; /* hold values to convert */
|
||||
|
||||
for (n = 0; n < 2; n++) {
|
||||
if (hexStg[n] == '\0')
|
||||
break;
|
||||
if (hexStg[n] > 0x29 && hexStg[n] < 0x40)
|
||||
digit[n] = hexStg[n] & 0x0f;
|
||||
else if (hexStg[n] >= 'a' && hexStg[n] <= 'f')
|
||||
digit[n] = (hexStg[n] & 0x0f) + 9;
|
||||
else if (hexStg[n] >= 'A' && hexStg[n] <= 'F')
|
||||
digit[n] = (hexStg[n] & 0x0f) + 9;
|
||||
else
|
||||
break;
|
||||
}
|
||||
|
||||
intValue = 0;
|
||||
count = n;
|
||||
m = n - 1;
|
||||
n = 0;
|
||||
while (n < count) {
|
||||
intValue = intValue | (digit[n] << (m << 2));
|
||||
m--; /* adjust the position to set */
|
||||
n++; /* next digit to process */
|
||||
}
|
||||
|
||||
return (intValue);
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Convert an integer string to its equivalent value.
|
||||
*/
|
||||
static u8
|
||||
atoi(uchar * string)
|
||||
{
|
||||
u8 res = 0;
|
||||
while (*string >= '0' && *string <= '9') {
|
||||
res *= 10;
|
||||
res += *string - '0';
|
||||
string++;
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Key-value pairs are separated by "=" sign.
|
||||
*/
|
||||
static void
|
||||
findKey(uchar * buffer, int *loc, u8 len)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
if (buffer[i] == '=') {
|
||||
*loc = i;
|
||||
return;
|
||||
}
|
||||
|
||||
/* return -1 is no "=" sign found */
|
||||
*loc = -1;
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Compute a new ML300 CRC when user calls the saveenv command.
|
||||
* Also update EEPROM with new CRC value.
|
||||
*/
|
||||
static u8
|
||||
update_crc(u32 len, uchar * data)
|
||||
{
|
||||
uchar temp[6] = { 'C', '=', 0x00, 0x00, 0x00, 0x00 };
|
||||
u32 crc; /* new crc value */
|
||||
u32 i;
|
||||
|
||||
crc = 0;
|
||||
|
||||
/* calculate new CRC */
|
||||
for (i = 0; i < len; i++)
|
||||
crc += data[i];
|
||||
|
||||
/* CRC includes key for check sum */
|
||||
crc += 'C' + '=';
|
||||
|
||||
/* compose new CRC to be updated */
|
||||
temp[2] = hex[(crc >> 4) & 0xf];
|
||||
temp[3] = hex[crc & 0xf];
|
||||
|
||||
/* check to see if env size exceeded */
|
||||
if (len + 6 > ENV_SIZE) {
|
||||
printf("ERROR: not enough space to store CRC on EEPROM");
|
||||
return 1;
|
||||
}
|
||||
|
||||
memcpy(data + len, temp, 6);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Read out ML300 CRC and compare it with a runtime calculated ML300 CRC.
|
||||
* If equal, then pass back a u-boot CRC value, otherwise pass back
|
||||
* junk to indicate CRC error.
|
||||
*/
|
||||
static void
|
||||
read_crc(uchar * buffer, int len)
|
||||
{
|
||||
u32 addr, n;
|
||||
u32 crc; /* runtime crc */
|
||||
u8 old[2] = { 0xff, 0xff }; /* current CRC in EEPROM */
|
||||
u8 stop; /* indication of end of env data */
|
||||
u8 pre; /* previous EEPROM data bit */
|
||||
int i, loc;
|
||||
|
||||
addr = CONFIG_ENV_OFFSET; /* start from first env address */
|
||||
n = 0;
|
||||
pre = 1;
|
||||
stop = 1;
|
||||
crc = 0;
|
||||
|
||||
/* calculate runtime CRC according to ML300 and read back
|
||||
old CRC stored in the EEPROM */
|
||||
while (n < CONFIG_ENV_SIZE) {
|
||||
receive(addr, buffer, len);
|
||||
|
||||
/* found two null chars, end of env */
|
||||
if ((pre || buffer[0]) == 0)
|
||||
break;
|
||||
|
||||
findKey(buffer, &loc, len);
|
||||
|
||||
/* found old check sum, read and store old CRC */
|
||||
if ((loc == 0 && pre == 'C')
|
||||
|| (loc > 0 && buffer[loc - 1] == 'C'))
|
||||
receive(addr + loc + 1, old, 2);
|
||||
|
||||
pre = buffer[len - 1];
|
||||
|
||||
/* calculate runtime ML300 CRC */
|
||||
crc += buffer[0];
|
||||
i = 1;
|
||||
do {
|
||||
crc += buffer[i];
|
||||
stop = buffer[i] || buffer[i - 1];
|
||||
i++;
|
||||
} while (stop && (i < len));
|
||||
|
||||
if (stop == 0)
|
||||
break;
|
||||
|
||||
n += len;
|
||||
addr += len;
|
||||
}
|
||||
|
||||
/* exclude old CRC from runtime calculation */
|
||||
crc -= (old[0] + old[1]);
|
||||
|
||||
/* match CRC values, send back u-boot CRC */
|
||||
if ((old[0] == hex[(crc >> 4) & 0xf])
|
||||
&& (old[1] == hex[crc & 0xf])) {
|
||||
crc = 0;
|
||||
n = 0;
|
||||
addr =
|
||||
CONFIG_ENV_OFFSET - offsetof(env_t, crc) + offsetof(env_t,
|
||||
data);
|
||||
/* calculate u-boot crc */
|
||||
while (n < ENV_SIZE) {
|
||||
receive(addr, buffer, len);
|
||||
crc = crc32(crc, buffer, len);
|
||||
n += len;
|
||||
addr += len;
|
||||
}
|
||||
|
||||
memcpy(buffer, &crc, 4);
|
||||
}
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Convert IP address to hexadecimals.
|
||||
*/
|
||||
static void
|
||||
ip_ml300(uchar * s, uchar * res)
|
||||
{
|
||||
char temp[2];
|
||||
u8 i;
|
||||
|
||||
res[0] = 0x00;
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
sprintf(temp, "%02x", atoi(s));
|
||||
s = (uchar *)strchr((char *)s, '.') + 1;
|
||||
strcat((char *)res, temp);
|
||||
}
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Change 0xff (255), a dummy null char to 0x00.
|
||||
*/
|
||||
static void
|
||||
change_null(uchar * s)
|
||||
{
|
||||
if (s != NULL) {
|
||||
change_null((uchar *)strchr((char *)s + 1, 255));
|
||||
*(strchr((char *)s, 255)) = '\0';
|
||||
}
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Update environment variable name and values to u-boot standard.
|
||||
*/
|
||||
void
|
||||
convert_env(void)
|
||||
{
|
||||
char *s; /* pointer to env value */
|
||||
char temp[20]; /* temp storage for addresses */
|
||||
|
||||
/* E -> ethaddr */
|
||||
s = getenv("E");
|
||||
if (s != NULL) {
|
||||
sprintf(temp, "%c%c.%c%c.%c%c.%c%c.%c%c.%c%c",
|
||||
s[0], s[1], s[ 2], s[ 3],
|
||||
s[4], s[5], s[ 6], s[ 7],
|
||||
s[8], s[9], s[10], s[11] );
|
||||
setenv("ethaddr", temp);
|
||||
setenv("E", NULL);
|
||||
}
|
||||
|
||||
/* L -> serial# */
|
||||
s = getenv("L");
|
||||
if (s != NULL) {
|
||||
setenv("serial#", s);
|
||||
setenv("L", NULL);
|
||||
}
|
||||
|
||||
/* I -> ipaddr */
|
||||
s = getenv("I");
|
||||
if (s != NULL) {
|
||||
sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)),
|
||||
axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6)));
|
||||
setenv("ipaddr", temp);
|
||||
setenv("I", NULL);
|
||||
}
|
||||
|
||||
/* S -> serverip */
|
||||
s = getenv("S");
|
||||
if (s != NULL) {
|
||||
sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)),
|
||||
axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6)));
|
||||
setenv("serverip", temp);
|
||||
setenv("S", NULL);
|
||||
}
|
||||
|
||||
/* A -> bootargs */
|
||||
s = getenv("A");
|
||||
if (s != NULL) {
|
||||
setenv("bootargs", s);
|
||||
setenv("A", NULL);
|
||||
}
|
||||
|
||||
/* F -> bootfile */
|
||||
s = getenv("F");
|
||||
if (s != NULL) {
|
||||
setenv("bootfile", s);
|
||||
setenv("F", NULL);
|
||||
}
|
||||
|
||||
/* M -> bootcmd */
|
||||
s = getenv("M");
|
||||
if (s != NULL) {
|
||||
setenv("bootcmd", s);
|
||||
setenv("M", NULL);
|
||||
}
|
||||
|
||||
/* Don't include C (CRC) */
|
||||
setenv("C", NULL);
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Save user modified environment values back to EEPROM.
|
||||
*/
|
||||
static void
|
||||
save_env(void)
|
||||
{
|
||||
char eprom[ENV_SIZE]; /* buffer to be written back to EEPROM */
|
||||
char *s, temp[20];
|
||||
char ff[] = { 0xff, 0x00 }; /* dummy null value */
|
||||
u32 len; /* length of env to be written to EEPROM */
|
||||
|
||||
eprom[0] = 0x00;
|
||||
|
||||
/* ethaddr -> E */
|
||||
s = getenv("ethaddr");
|
||||
if (s != NULL) {
|
||||
strcat(eprom, "E=");
|
||||
sprintf(temp, "%c%c%c%c%c%c%c%c%c%c%c%c",
|
||||
*s, *(s + 1), *(s + 3), *(s + 4), *(s + 6), *(s + 7),
|
||||
*(s + 9), *(s + 10), *(s + 12), *(s + 13), *(s + 15),
|
||||
*(s + 16));
|
||||
strcat(eprom, temp);
|
||||
strcat(eprom, ff);
|
||||
}
|
||||
|
||||
/* serial# -> L */
|
||||
s = getenv("serial#");
|
||||
if (s != NULL) {
|
||||
strcat(eprom, "L=");
|
||||
strcat(eprom, s);
|
||||
strcat(eprom, ff);
|
||||
}
|
||||
|
||||
/* ipaddr -> I */
|
||||
s = getenv("ipaddr");
|
||||
if (s != NULL) {
|
||||
strcat(eprom, "I=");
|
||||
ip_ml300((uchar *)s, (uchar *)temp);
|
||||
strcat(eprom, temp);
|
||||
strcat(eprom, ff);
|
||||
}
|
||||
|
||||
/* serverip -> S */
|
||||
s = getenv("serverip");
|
||||
if (s != NULL) {
|
||||
strcat(eprom, "S=");
|
||||
ip_ml300((uchar *)s, (uchar *)temp);
|
||||
strcat(eprom, temp);
|
||||
strcat(eprom, ff);
|
||||
}
|
||||
|
||||
/* bootargs -> A */
|
||||
s = getenv("bootargs");
|
||||
if (s != NULL) {
|
||||
strcat(eprom, "A=");
|
||||
strcat(eprom, s);
|
||||
strcat(eprom, ff);
|
||||
}
|
||||
|
||||
/* bootfile -> F */
|
||||
s = getenv("bootfile");
|
||||
if (s != NULL) {
|
||||
strcat(eprom, "F=");
|
||||
strcat(eprom, s);
|
||||
strcat(eprom, ff);
|
||||
}
|
||||
|
||||
/* bootcmd -> M */
|
||||
s = getenv("bootcmd");
|
||||
if (s != NULL) {
|
||||
strcat(eprom, "M=");
|
||||
strcat(eprom, s);
|
||||
strcat(eprom, ff);
|
||||
}
|
||||
|
||||
len = strlen(eprom); /* find env length without crc */
|
||||
change_null((uchar *)eprom); /* change 0xff to 0x00 */
|
||||
|
||||
/* update EEPROM env values if there is enough space */
|
||||
if (update_crc(len, (uchar *)eprom) == 0)
|
||||
send(CONFIG_ENV_OFFSET, (uchar *)eprom, len + 6);
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* U-boot call for EEPROM read associated activities.
|
||||
*/
|
||||
int
|
||||
i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
|
||||
{
|
||||
|
||||
if (envStep == 0) {
|
||||
/* first read call is for crc */
|
||||
read_crc(buffer, len);
|
||||
++envStep;
|
||||
return 0;
|
||||
} else if (envStep == 1) {
|
||||
/* then read out EEPROM content for runtime u-boot CRC calculation */
|
||||
receive(addr, buffer, len);
|
||||
|
||||
if (addr + len - CONFIG_ENV_OFFSET == CONFIG_ENV_SIZE)
|
||||
/* end of runtime crc read */
|
||||
++envStep;
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (len < 2) {
|
||||
/* when call getenv_r */
|
||||
receive(addr, buffer, len);
|
||||
} else if (addr + len < CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) {
|
||||
/* calling env_relocate(), but don't read out
|
||||
crc value from EEPROM */
|
||||
receive(addr, buffer + 4, len);
|
||||
} else {
|
||||
receive(addr, buffer + 4, len - 4);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* U-boot call for EEPROM write acativities.
|
||||
*/
|
||||
int
|
||||
i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
|
||||
{
|
||||
/* save env on last page write called by u-boot */
|
||||
if (addr + len >= CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
|
||||
save_env();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/************************************************************************
|
||||
* Dummy function.
|
||||
*/
|
||||
int
|
||||
i2c_probe(uchar chip)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
#endif
|
|
@ -601,7 +601,7 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|||
ok++;
|
||||
if (devno)
|
||||
printf("\n");
|
||||
printf("print_part of %x\n", devno);
|
||||
debug("print_part of %x\n", devno);
|
||||
print_part(stor_dev);
|
||||
}
|
||||
}
|
||||
|
@ -610,7 +610,7 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|||
stor_dev = usb_stor_get_dev(devno);
|
||||
if (stor_dev->type != DEV_TYPE_UNKNOWN) {
|
||||
ok++;
|
||||
printf("print_part of %x\n", devno);
|
||||
debug("print_part of %x\n", devno);
|
||||
print_part(stor_dev);
|
||||
}
|
||||
}
|
||||
|
|
24
common/lcd.c
24
common/lcd.c
|
@ -63,7 +63,7 @@
|
|||
/************************************************************************/
|
||||
#ifdef CONFIG_LCD_LOGO
|
||||
# include <bmp_logo.h> /* Get logo data, width and height */
|
||||
# if (CONSOLE_COLOR_WHITE >= BMP_LOGO_OFFSET)
|
||||
# if (CONSOLE_COLOR_WHITE >= BMP_LOGO_OFFSET) && (LCD_BPP != LCD_COLOR16)
|
||||
# error Default Color Map overlaps with Logo Color Map
|
||||
# endif
|
||||
#endif
|
||||
|
@ -218,8 +218,12 @@ static void lcd_drawchars (ushort x, ushort y, uchar *str, int count)
|
|||
|
||||
for (row=0; row < VIDEO_FONT_HEIGHT; ++row, dest += lcd_line_length) {
|
||||
uchar *s = str;
|
||||
uchar *d = dest;
|
||||
int i;
|
||||
#if LCD_BPP == LCD_COLOR16
|
||||
ushort *d = (ushort *)dest;
|
||||
#else
|
||||
uchar *d = dest;
|
||||
#endif
|
||||
|
||||
#if LCD_BPP == LCD_MONOCHROME
|
||||
uchar rest = *d & -(1 << (8-off));
|
||||
|
@ -244,7 +248,7 @@ static void lcd_drawchars (ushort x, ushort y, uchar *str, int count)
|
|||
bits <<= 1;
|
||||
}
|
||||
#elif LCD_BPP == LCD_COLOR16
|
||||
for (c=0; c<16; ++c) {
|
||||
for (c=0; c<8; ++c) {
|
||||
*d++ = (bits & 0x80) ?
|
||||
lcd_color_fg : lcd_color_bg;
|
||||
bits <<= 1;
|
||||
|
@ -521,6 +525,13 @@ void bitmap_plot (int x, int y)
|
|||
cmap = (ushort *)&(cp->lcd_cmap[BMP_LOGO_OFFSET*sizeof(ushort)]);
|
||||
#elif defined(CONFIG_ATMEL_LCD)
|
||||
cmap = (uint *) (panel_info.mmio + ATMEL_LCDC_LUT(0));
|
||||
#else
|
||||
/*
|
||||
* default case: generic system with no cmap (most likely 16bpp)
|
||||
* We set cmap to the source palette, so no change is done.
|
||||
* This avoids even more ifdef in the next stanza
|
||||
*/
|
||||
cmap = bmp_logo_palette;
|
||||
#endif
|
||||
|
||||
WATCHDOG_RESET();
|
||||
|
@ -559,10 +570,15 @@ void bitmap_plot (int x, int y)
|
|||
}
|
||||
}
|
||||
else { /* true color mode */
|
||||
u16 col16;
|
||||
fb16 = (ushort *)(lcd_base + y * lcd_line_length + x);
|
||||
for (i=0; i<BMP_LOGO_HEIGHT; ++i) {
|
||||
for (j=0; j<BMP_LOGO_WIDTH; j++) {
|
||||
fb16[j] = bmp_logo_palette[(bmap[j])];
|
||||
col16 = bmp_logo_palette[(bmap[j]-16)];
|
||||
fb16[j] =
|
||||
((col16 & 0x000F) << 1) |
|
||||
((col16 & 0x00F0) << 3) |
|
||||
((col16 & 0x0F00) << 4);
|
||||
}
|
||||
bmap += BMP_LOGO_WIDTH;
|
||||
fb16 += panel_info.vl_col;
|
||||
|
|
|
@ -111,17 +111,72 @@ void reconfigure_pll(u32 new_cpu_freq)
|
|||
mtcpr(CPR0_SPCID, reg);
|
||||
reset_needed = 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Set reload inhibit so configuration will persist across
|
||||
* processor resets */
|
||||
/* Get current value of FWDVA.*/
|
||||
mfcpr(CPR0_PLLD, reg);
|
||||
temp = (reg & PLLD_FWDVA_MASK) >> 16;
|
||||
|
||||
/*
|
||||
* Check to see if FWDVA has been set to value of 1. if it has we must
|
||||
* modify it.
|
||||
*/
|
||||
if (temp == 1) {
|
||||
mfcpr(CPR0_PLLD, reg);
|
||||
/* Get current value of fbdv. */
|
||||
temp = (reg & PLLD_FBDV_MASK) >> 24;
|
||||
fbdv = temp ? temp : 32;
|
||||
/* Get current value of lfbdv. */
|
||||
temp = (reg & PLLD_LFBDV_MASK);
|
||||
lfbdv = temp ? temp : 64;
|
||||
/*
|
||||
* Load register that contains current boot strapping option.
|
||||
*/
|
||||
mfcpr(CPR0_ICFG, reg);
|
||||
/* Shift strapping option into low 3 bits.*/
|
||||
reg = (reg >> 28);
|
||||
|
||||
if ((reg == BOOT_STRAP_OPTION_A) || (reg == BOOT_STRAP_OPTION_B) ||
|
||||
(reg == BOOT_STRAP_OPTION_D) || (reg == BOOT_STRAP_OPTION_E)) {
|
||||
/*
|
||||
* Get current value of FWDVA. Assign current FWDVA to
|
||||
* new FWDVB.
|
||||
*/
|
||||
mfcpr(CPR0_PLLD, reg);
|
||||
target_fwdvb = (reg & PLLD_FWDVA_MASK) >> 16;
|
||||
fwdvb = target_fwdvb ? target_fwdvb : 8;
|
||||
/*
|
||||
* Get current value of FWDVB. Assign current FWDVB to
|
||||
* new FWDVA.
|
||||
*/
|
||||
target_fwdva = (reg & PLLD_FWDVB_MASK) >> 8;
|
||||
fwdva = target_fwdva ? target_fwdva : 16;
|
||||
/*
|
||||
* Update CPR0_PLLD with switched FWDVA and FWDVB.
|
||||
*/
|
||||
reg &= ~(PLLD_FWDVA_MASK | PLLD_FWDVB_MASK |
|
||||
PLLD_FBDV_MASK | PLLD_LFBDV_MASK);
|
||||
reg |= ((fwdva == 16 ? 0 : fwdva) << 16) |
|
||||
((fwdvb == 8 ? 0 : fwdvb) << 8) |
|
||||
((fbdv == 32 ? 0 : fbdv) << 24) |
|
||||
(lfbdv == 64 ? 0 : lfbdv);
|
||||
mtcpr(CPR0_PLLD, reg);
|
||||
/* Acknowledge that a reset is required. */
|
||||
reset_needed = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (reset_needed) {
|
||||
/*
|
||||
* Set reload inhibit so configuration will persist across
|
||||
* processor resets
|
||||
*/
|
||||
mfcpr(CPR0_ICFG, reg);
|
||||
reg &= ~CPR0_ICFG_RLI_MASK;
|
||||
reg |= 1 << 31;
|
||||
mtcpr(CPR0_ICFG, reg);
|
||||
}
|
||||
|
||||
/* Reset processor if configuration changed */
|
||||
if (reset_needed) {
|
||||
/* Reset processor if configuration changed */
|
||||
__asm__ __volatile__ ("sync; isync");
|
||||
mtspr(SPRN_DBCR0, 0x20000000);
|
||||
}
|
||||
|
|
128
doc/README.ml300
128
doc/README.ml300
|
@ -1,128 +0,0 @@
|
|||
Xilinx ML300 platform
|
||||
=====================
|
||||
|
||||
0. Introduction
|
||||
---------------
|
||||
|
||||
The Xilinx ML300 board is based on the Virtex-II Pro FPGA with
|
||||
integrated AMCC PowerPC 405 core. The board is normally booted from
|
||||
System ACE CF. U-Boot is then run out of main memory.
|
||||
|
||||
An FPGA is a configurable and thus very flexible device. To
|
||||
accommodate for this flexibility this port of U-Boot includes the
|
||||
required means to regenerate the drivers and configuration files if
|
||||
you decide to change the hardware design. The required steps are
|
||||
described below.
|
||||
|
||||
|
||||
1. Requirements
|
||||
---------------
|
||||
|
||||
To compile and run U-Boot on the Xilinx ML300 platform you need the
|
||||
following items.
|
||||
|
||||
- A Xilinx ML300 platform (see http://www.xilinx.com/ml300)
|
||||
- EDK and ISE development tools (shipping with ML300)
|
||||
- Parallel4 cable (shipping with ML300)
|
||||
- The EDK reference design for ML300. You can get this as design #6 from
|
||||
http://www.xilinx.com/ise/embedded/edk_examples.htm
|
||||
- A BOOTP/TFTP server
|
||||
|
||||
|
||||
2. Quick Start
|
||||
--------------
|
||||
|
||||
To compile and run U-Boot on ML300 follow the steps below. Make sure
|
||||
to consult the documentation for U-Boot, EDK, and the EDK reference
|
||||
design for ML300 if you have any questions.
|
||||
|
||||
1. Implement the EDK reference design for ML300. You can use any of
|
||||
the project files, for example from a xygwin shell:
|
||||
$ xps -nw system_linux.xmp
|
||||
XPS% run init_bram
|
||||
2. Configure and compile U-Boot. Change into the root directory of
|
||||
U-Boot and run:
|
||||
$ export CROSS_COMPILE=powerpc-eabi-
|
||||
$ make ml300_config
|
||||
$ make
|
||||
3. Set up the ML300, connect the Parallel4 and the serial cable. Start
|
||||
a terminal on your host computer and set the communication
|
||||
parameters to 9600,8N1,no handshake.
|
||||
4. Set up the BOOTP/TFTP server on your host machine. U-Boot is
|
||||
preconfigured to use a fixed HW MAC address of 00:0A:35:00:22:01.
|
||||
5. Download the bitstream to the ML300.
|
||||
6. Use XMD to download and run U-Boot on the ML300:
|
||||
$ xmd
|
||||
XMD% ppcconnect
|
||||
XMD% dow u-boot
|
||||
XMD% run
|
||||
|
||||
You can now make an ACE file out of bitstream and U-Boot:
|
||||
$ xmd genace.tcl -jprog -board ml300 -hw \
|
||||
implementation/download.bit -elf u-boot -ace top.ace
|
||||
|
||||
Put the ACE file onto the MicroDrive, for example into xilinx/myace,
|
||||
and reboot ML300.
|
||||
|
||||
|
||||
3. Generating a Custom BSP for U-Boot
|
||||
-------------------------------------
|
||||
|
||||
If you decide to change the EDK reference design for ML300 or if you
|
||||
build a new design from scratch either with the Base System Builder in
|
||||
XPS or all by hand you most likely will change the base addresses for
|
||||
the Uart and the Ethernet peripheral. If you do so you will have two
|
||||
options:
|
||||
|
||||
1. Edit boards/xilinx/ml300/xparameters.h to reflect the changes you
|
||||
made to your hardware.
|
||||
2. Use the MLD technology provided by Xilinx Platform Studio to make
|
||||
the changes automatically. To do so go to the root directory of the
|
||||
EDK reference design for ML300. Copy the Linux project file and the
|
||||
Linux software configuration file:
|
||||
$ cp system_linux.xmp system_uboot.xmp
|
||||
$ cp system_linux.mss system_uboot.mss
|
||||
|
||||
Edit system_uboot.xmp and and have it point to system_uboot.mss for
|
||||
the software configuration.
|
||||
|
||||
Then, copy the sw_services directory in
|
||||
boards/xilinx/ml300/sw_services to the root directory of the EDK
|
||||
reference design for ML300.
|
||||
$ cp -R <uboot dir>/boards/xilinx/ml300/sw_services <edk dir>
|
||||
|
||||
Modify system_uboot.mss. Look for the Linux library definition
|
||||
and change it to generate a BSP for U-Boot. An example, might look
|
||||
like this:
|
||||
|
||||
BEGIN LIBRARY
|
||||
PARAMETER LIBRARY_NAME = uboot
|
||||
PARAMETER LIBRARY_VER = 1.00.a
|
||||
PARAMETER CONNECTED_PERIPHS = (opb_uart16550_0,opb_ethernet_0)
|
||||
PARAMETER TARGET_DIR = <uboot dir>
|
||||
END
|
||||
|
||||
Now, you are ready to generate the Xilinx ML300 BSP for U-Boot:
|
||||
$ xps -nw system_uboot.xmp
|
||||
XPS% run libs
|
||||
|
||||
If all goes well the new configuration has been copied into the
|
||||
right places within the U-Boot source tree. Recompile U-Boot and
|
||||
run it on the ML300.
|
||||
|
||||
|
||||
4. ToDo
|
||||
-------
|
||||
|
||||
- Add support for all other peripherals on ML300.
|
||||
- Read the MAC address out of the IIC EEPROM.
|
||||
- Store the bootargs in the IIC EEPROM.
|
||||
|
||||
|
||||
5. References
|
||||
-------------
|
||||
|
||||
ML300: http://www.xilinx.com/ml300
|
||||
EDK: http://www.xilinx.com/edk
|
||||
ISE: http://www.xilinx.com/ise
|
||||
Reference Design: http://www.xilinx.com/ise/embedded/edk_examples.htm
|
|
@ -537,7 +537,10 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector,
|
|||
ulong start;
|
||||
|
||||
#if CONFIG_SYS_HZ != 1000
|
||||
tout *= CONFIG_SYS_HZ/1000;
|
||||
if ((ulong)CONFIG_SYS_HZ > 100000)
|
||||
tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
|
||||
else
|
||||
tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
|
||||
#endif
|
||||
|
||||
/* Wait for command completion */
|
||||
|
|
|
@ -1,181 +0,0 @@
|
|||
/*
|
||||
* ML300.h: ML300 specific config options
|
||||
*
|
||||
* http://www.xilinx.com/ml300
|
||||
*
|
||||
* Derived from : ML2.h
|
||||
*
|
||||
* Author: Xilinx, Inc.
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*
|
||||
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
|
||||
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
|
||||
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
|
||||
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
|
||||
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR
|
||||
* OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
|
||||
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
|
||||
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
|
||||
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
|
||||
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
|
||||
* FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
*
|
||||
* Xilinx products are not intended for use in life support appliances,
|
||||
* devices, or systems. Use in such applications is expressly prohibited.
|
||||
*
|
||||
*
|
||||
* (c) Copyright 2002 Xilinx Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/* #define DEBUG */
|
||||
/* #define ET_DEBUG 1 */
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
*/
|
||||
|
||||
#define CONFIG_405 1 /* This is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
|
||||
#define CONFIG_XILINX_405 1
|
||||
#define CONFIG_XILINX_ML300 1 /* ...on a Xilinx ML300 board */
|
||||
|
||||
#define CONFIG_SYSTEMACE 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
#define CONFIG_SYS_SYSTEMACE_BASE XPAR_OPB_SYSACE_0_BASEADDR
|
||||
#define CONFIG_SYS_SYSTEMACE_WIDTH XPAR_XSYSACE_MEM_WIDTH
|
||||
|
||||
#define CONFIG_ENV_IS_IN_EEPROM 1 /* environment is in EEPROM */
|
||||
|
||||
/* following are used only if env is in EEPROM */
|
||||
#ifdef CONFIG_ENV_IS_IN_EEPROM
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR XPAR_PERSISTENT_0_IIC_0_EEPROMADDR
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_ENV_OFFSET XPAR_PERSISTENT_0_IIC_0_BASEADDR
|
||||
#define CONFIG_MISC_INIT_R 1 /* used to call out convert_env() */
|
||||
#define CONFIG_ENV_OVERWRITE 1 /* allow users to update ethaddr and serial# */
|
||||
#endif
|
||||
|
||||
#include "../board/xilinx/ml300/xparameters.h"
|
||||
|
||||
#define CONFIG_SYS_NO_FLASH 1 /* no flash */
|
||||
#define CONFIG_ENV_SIZE XPAR_PERSISTENT_0_IIC_0_HIGHADDR - XPAR_PERSISTENT_0_IIC_0_BASEADDR + 1
|
||||
#define CONFIG_BAUDRATE 9600
|
||||
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
|
||||
|
||||
#define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
|
||||
|
||||
#define CONFIG_BOOTARGS "console=ttyS0,9600 ip=off " \
|
||||
"root=/dev/xsysace/disc0/part3 rw"
|
||||
|
||||
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
|
||||
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
|
||||
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_NET
|
||||
|
||||
#undef CONFIG_CMD_FLASH
|
||||
#undef CONFIG_CMD_LOADS
|
||||
#undef CONFIG_CMD_FAT
|
||||
#undef CONFIG_CMD_IMLS
|
||||
|
||||
|
||||
/* #define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ */
|
||||
/* 300000000 */
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
|
||||
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
|
||||
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
|
||||
|
||||
#define CONFIG_SYS_DUART_CHAN 0
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE -4
|
||||
#define CONFIG_SYS_NS16550 1
|
||||
#define CONFIG_SYS_INIT_CHAN1 1
|
||||
|
||||
/* The following table includes the supported baudrates */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE \
|
||||
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
|
||||
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
|
||||
|
||||
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Start addresses for the final memory configuration
|
||||
* (Set up by the startup code)
|
||||
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x00000000
|
||||
#define CONFIG_SYS_MONITOR_BASE 0x04000000
|
||||
#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
|
||||
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
* have to be in the first 8 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization.
|
||||
*/
|
||||
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for initial stack pointer and data area (in DPRAM)
|
||||
*/
|
||||
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */
|
||||
#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
|
||||
|
||||
/*
|
||||
* Internal Definitions
|
||||
*
|
||||
* Boot Flags
|
||||
*/
|
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||
|
||||
#endif /* __CONFIG_H */
|
|
@ -102,6 +102,7 @@
|
|||
at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
|
||||
at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
|
||||
}
|
||||
#define I2C_SOFT_DECLARATIONS
|
||||
/* Configure data pin as output */
|
||||
#define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
|
||||
/* Configure data pin as input */
|
||||
|
|
|
@ -68,6 +68,12 @@
|
|||
#define CPR0_SPCID 0x0120
|
||||
#define CPR0_ICFG 0x0140
|
||||
|
||||
/* 440EPX boot strap options */
|
||||
#define BOOT_STRAP_OPTION_A 0x00000000
|
||||
#define BOOT_STRAP_OPTION_B 0x00000001
|
||||
#define BOOT_STRAP_OPTION_D 0x00000003
|
||||
#define BOOT_STRAP_OPTION_E 0x00000004
|
||||
|
||||
/* 440gx sdr register definations */
|
||||
#define SDR0_SDSTP0 0x0020 /* */
|
||||
#define SDR0_SDSTP1 0x0021 /* */
|
||||
|
|
|
@ -37,6 +37,7 @@ struct mkimage_params params = {
|
|||
.type = IH_TYPE_KERNEL,
|
||||
.comp = IH_COMP_GZIP,
|
||||
.dtc = MKIMAGE_DEFAULT_DTC_OPTIONS,
|
||||
.imagename = "",
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
Loading…
Add table
Reference in a new issue