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mpc85xx/t104xrdb: convert deep sleep to generic board interface
A new interface is introduced to support generic board structure. Converts it to use new interface. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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parent
9c7c86f431
commit
0023352855
4 changed files with 36 additions and 29 deletions
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@ -11,6 +11,7 @@
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#include <fsl_ddr_sdram.h>
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#include <fsl_ddr_sdram.h>
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#include <fsl_ddr_dimm_params.h>
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#include <fsl_ddr_dimm_params.h>
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#include <asm/fsl_law.h>
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#include <asm/fsl_law.h>
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#include <asm/mpc85xx_gpio.h>
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#include "ddr.h"
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#include "ddr.h"
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@ -109,6 +110,19 @@ found:
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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}
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}
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#if defined(CONFIG_DEEP_SLEEP)
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void board_mem_sleep_setup(void)
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{
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void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
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/* does not provide HW signals for power management */
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clrbits_8(cpld_base + 0x17, 0x40);
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/* Disable MCKE isolation */
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gpio_set_value(2, 0);
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udelay(1);
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}
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#endif
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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{
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phys_size_t dram_size;
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phys_size_t dram_size;
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@ -124,5 +138,10 @@ phys_size_t initdram(int board_type)
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#else
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#else
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dram_size = fsl_ddr_sdram_size();
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dram_size = fsl_ddr_sdram_size();
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#endif
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#endif
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#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
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fsl_dp_resume();
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#endif
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return dram_size;
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return dram_size;
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}
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}
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@ -11,7 +11,7 @@
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#include <mmc.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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#include <fsl_esdhc.h>
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#include <spi_flash.h>
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#include <spi_flash.h>
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#include <asm/mpc85xx_gpio.h>
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#include "../common/sleep.h"
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@ -64,8 +64,8 @@ void board_init_f(ulong bootflag)
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#ifdef CONFIG_DEEP_SLEEP
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#ifdef CONFIG_DEEP_SLEEP
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/* disable the console if boot from deep sleep */
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/* disable the console if boot from deep sleep */
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if (in_be32(&gur->scrtsr[0]) & (1 << 3))
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if (is_warm_boot())
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gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
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fsl_dp_disable_console();
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#endif
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#endif
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/* compiler optimization barrier needed for GCC >= 3.4 */
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/* compiler optimization barrier needed for GCC >= 3.4 */
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__asm__ __volatile__("" : : : "memory");
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__asm__ __volatile__("" : : : "memory");
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@ -132,16 +132,3 @@ void board_init_r(gd_t *gd, ulong dest_addr)
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nand_boot();
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nand_boot();
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#endif
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#endif
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}
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}
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#ifdef CONFIG_DEEP_SLEEP
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void board_mem_sleep_setup(void)
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{
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void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
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/* does not provide HW signals for power management */
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clrbits_8(cpld_base + 0x17, 0x40);
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/* Disable MCKE isolation */
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gpio_set_value(2, 0);
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udelay(1);
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}
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#endif
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@ -17,8 +17,7 @@
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#include <asm/fsl_portals.h>
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#include <asm/fsl_portals.h>
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#include <asm/fsl_liodn.h>
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#include <asm/fsl_liodn.h>
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#include <fm_eth.h>
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#include <fm_eth.h>
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#include <asm/mpc85xx_gpio.h>
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#include "../common/sleep.h"
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#include "t104xrdb.h"
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#include "t104xrdb.h"
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#include "cpld.h"
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#include "cpld.h"
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@ -44,6 +43,16 @@ int checkboard(void)
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return 0;
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return 0;
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}
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}
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int board_early_init_f(void)
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{
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#if defined(CONFIG_DEEP_SLEEP)
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if (is_warm_boot())
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fsl_dp_disable_console();
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#endif
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return 0;
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}
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int board_early_init_r(void)
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int board_early_init_r(void)
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{
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{
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#ifdef CONFIG_SYS_FLASH_BASE
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#ifdef CONFIG_SYS_FLASH_BASE
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@ -113,14 +122,3 @@ int ft_board_setup(void *blob, bd_t *bd)
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return 0;
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return 0;
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}
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}
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#ifdef CONFIG_DEEP_SLEEP
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void board_mem_sleep_setup(void)
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{
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/* does not provide HW signals for power management */
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CPLD_WRITE(misc_ctl_status, (CPLD_READ(misc_ctl_status) & ~0x40));
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/* Disable MCKE isolation */
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gpio_set_value(2, 0);
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udelay(1);
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}
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#endif
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@ -104,7 +104,10 @@
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/* support deep sleep */
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/* support deep sleep */
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#define CONFIG_DEEP_SLEEP
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#define CONFIG_DEEP_SLEEP
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#if defined(CONFIG_DEEP_SLEEP)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_SILENT_CONSOLE
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#define CONFIG_SILENT_CONSOLE
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#endif
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#ifndef CONFIG_SYS_TEXT_BASE
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_TEXT_BASE 0xeff40000
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#define CONFIG_SYS_TEXT_BASE 0xeff40000
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