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Merge git://git.denx.de/u-boot-spi
This commit is contained in:
commit
002e91087c
2 changed files with 65 additions and 7 deletions
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@ -113,6 +113,27 @@ static int write_cr(struct spi_flash *flash, u8 wc)
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#endif
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#endif
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#ifdef CONFIG_SPI_FLASH_BAR
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#ifdef CONFIG_SPI_FLASH_BAR
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/*
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* This "clean_bar" is necessary in a situation when one was accessing
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* spi flash memory > 16 MiB by using Bank Address Register's BA24 bit.
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*
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* After it the BA24 bit shall be cleared to allow access to correct
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* memory region after SW reset (by calling "reset" command).
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*
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* Otherwise, the BA24 bit may be left set and then after reset, the
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* ROM would read/write/erase SPL from 16 MiB * bank_sel address.
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*/
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static int clean_bar(struct spi_flash *flash)
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{
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u8 cmd, bank_sel = 0;
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if (flash->bank_curr == 0)
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return 0;
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cmd = flash->bank_write_cmd;
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return spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
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}
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static int write_bar(struct spi_flash *flash, u32 offset)
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static int write_bar(struct spi_flash *flash, u32 offset)
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{
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{
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u8 cmd, bank_sel;
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u8 cmd, bank_sel;
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@ -339,6 +360,10 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
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len -= erase_size;
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len -= erase_size;
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}
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}
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#ifdef CONFIG_SPI_FLASH_BAR
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ret = clean_bar(flash);
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#endif
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return ret;
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return ret;
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}
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}
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@ -397,6 +422,10 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
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offset += chunk_len;
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offset += chunk_len;
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}
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}
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#ifdef CONFIG_SPI_FLASH_BAR
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ret = clean_bar(flash);
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#endif
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return ret;
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return ret;
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}
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}
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@ -500,6 +529,10 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
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data += read_len;
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data += read_len;
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}
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}
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#ifdef CONFIG_SPI_FLASH_BAR
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ret = clean_bar(flash);
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#endif
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free(cmd);
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free(cmd);
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return ret;
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return ret;
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}
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}
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@ -8,6 +8,7 @@
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#include <spl.h>
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#include <spl.h>
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#include <asm/gpio.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <libfdt.h>
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#ifdef CONFIG_SPL_OS_BOOT
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#ifdef CONFIG_SPL_OS_BOOT
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#error CONFIG_SPL_OS_BOOT is not supported yet
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#error CONFIG_SPL_OS_BOOT is not supported yet
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@ -261,27 +262,51 @@ static void spi0_read_data(void *buf, u32 addr, u32 len)
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}
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}
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}
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}
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static ulong spi_load_read(struct spl_load_info *load, ulong sector,
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ulong count, void *buf)
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{
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spi0_read_data(buf, sector, count);
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return count;
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}
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/*****************************************************************************/
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/*****************************************************************************/
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static int spl_spi_load_image(struct spl_image_info *spl_image,
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static int spl_spi_load_image(struct spl_image_info *spl_image,
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struct spl_boot_device *bootdev)
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struct spl_boot_device *bootdev)
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{
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{
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int err;
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int ret = 0;
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struct image_header *header;
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struct image_header *header;
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header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
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header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
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spi0_init();
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spi0_init();
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spi0_read_data((void *)header, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40);
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spi0_read_data((void *)header, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40);
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err = spl_parse_image_header(spl_image, header);
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if (err)
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return err;
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spi0_read_data((void *)spl_image->load_addr, CONFIG_SYS_SPI_U_BOOT_OFFS,
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if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
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spl_image->size);
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image_get_magic(header) == FDT_MAGIC) {
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struct spl_load_info load;
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debug("Found FIT image\n");
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load.dev = NULL;
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load.priv = NULL;
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load.filename = NULL;
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load.bl_len = 1;
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load.read = spi_load_read;
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ret = spl_load_simple_fit(spl_image, &load,
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CONFIG_SYS_SPI_U_BOOT_OFFS, header);
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} else {
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ret = spl_parse_image_header(spl_image, header);
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if (ret)
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return ret;
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spi0_read_data((void *)spl_image->load_addr,
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CONFIG_SYS_SPI_U_BOOT_OFFS, spl_image->size);
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}
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spi0_deinit();
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spi0_deinit();
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return 0;
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return ret;
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}
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}
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/* Use priorty 0 to override the default if it happens to be linked in */
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/* Use priorty 0 to override the default if it happens to be linked in */
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SPL_LOAD_IMAGE_METHOD("sunxi SPI", 0, BOOT_DEVICE_SPI, spl_spi_load_image);
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SPL_LOAD_IMAGE_METHOD("sunxi SPI", 0, BOOT_DEVICE_SPI, spl_spi_load_image);
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