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Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
This commit is contained in:
commit
008e61f512
8 changed files with 76 additions and 5 deletions
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@ -168,6 +168,25 @@ apply_a57_core_errata:
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msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
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msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
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#endif
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#endif
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#ifdef CONFIG_ARM_ERRATA_833471
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mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */
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/* FPSCR write flush.
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* Note that in some cases where a flush is unnecessary this
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could impact performance. */
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orr x0, x0, #1 << 38
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msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
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#endif
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#ifdef CONFIG_ARM_ERRATA_829520
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mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */
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/* Disable Indirect Predictor bit will prevent this erratum
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from occurring
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* Note that in some cases where a flush is unnecessary this
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could impact performance. */
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orr x0, x0, #1 << 4
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msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
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#endif
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#ifdef CONFIG_ARM_ERRATA_833069
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#ifdef CONFIG_ARM_ERRATA_833069
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mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */
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mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */
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/* Disable Enable Invalidates of BTB bit */
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/* Disable Enable Invalidates of BTB bit */
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@ -14,6 +14,52 @@
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/ {
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/ {
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model = "LS1043A QDS Board";
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model = "LS1043A QDS Board";
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aliases {
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spi0 = &qspi;
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spi1 = &dspi0;
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};
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};
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&dspi0 {
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bus-num = <0>;
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status = "okay";
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dflash0: n25q128a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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reg = <0>;
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spi-max-frequency = <1000000>; /* input clock */
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};
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dflash1: sst25wf040b {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3500000>;
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reg = <1>;
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};
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dflash2: en25s64 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3500000>;
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reg = <2>;
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};
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};
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&qspi {
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bus-num = <0>;
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status = "okay";
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qflash0: s25fl128s@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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};
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&i2c0 {
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&i2c0 {
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@ -121,6 +121,12 @@
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#define CONFIG_SYS_FSL_ERRATUM_A009663
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#define CONFIG_SYS_FSL_ERRATUM_A009663
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#define CONFIG_SYS_FSL_ERRATUM_A009942
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#define CONFIG_SYS_FSL_ERRATUM_A009942
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/* ARM A57 CORE ERRATA */
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#define CONFIG_ARM_ERRATA_826974
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#define CONFIG_ARM_ERRATA_828024
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#define CONFIG_ARM_ERRATA_829520
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#define CONFIG_ARM_ERRATA_833471
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#elif defined(CONFIG_LS1043A)
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#elif defined(CONFIG_LS1043A)
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#define CONFIG_MAX_CPUS 4
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#define CONFIG_MAX_CPUS 4
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#define CONFIG_SYS_CACHELINE_SIZE 64
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#define CONFIG_SYS_CACHELINE_SIZE 64
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@ -818,6 +818,7 @@ static int dprc_init(void)
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goto err_root_open;
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goto err_root_open;
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}
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}
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memset(&cfg, 0, sizeof(struct dprc_cfg));
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cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
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cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
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DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
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DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
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DPRC_CFG_OPT_ALLOC_ALLOWED;
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DPRC_CFG_OPT_ALLOC_ALLOWED;
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@ -1160,7 +1161,7 @@ int fsl_mc_ldpaa_exit(bd_t *bd)
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err = dpbp_exit();
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err = dpbp_exit();
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if (err < 0) {
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if (err < 0) {
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printf("dpni_exit() failed: %d\n", err);
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printf("dpbp_exit() failed: %d\n", err);
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goto err;
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goto err;
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}
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}
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@ -665,5 +665,6 @@ unsigned long get_board_ddr_clk(void);
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#endif
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#endif
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#include <asm/fsl_secure_boot.h>
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#include <asm/fsl_secure_boot.h>
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
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#endif
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#endif
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@ -523,5 +523,6 @@
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#endif
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#endif
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#include <asm/fsl_secure_boot.h>
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#include <asm/fsl_secure_boot.h>
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
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#endif
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#endif
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@ -15,9 +15,6 @@
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#define CONFIG_GICV3
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#define CONFIG_GICV3
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#define CONFIG_FSL_TZPC_BP147
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#define CONFIG_FSL_TZPC_BP147
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/* Errata fixes */
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#define CONFIG_ARM_ERRATA_828024
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#define CONFIG_ARM_ERRATA_826974
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#include <asm/arch/ls2080a_stream_id.h>
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#include <asm/arch/ls2080a_stream_id.h>
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#include <asm/arch/config.h>
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#include <asm/arch/config.h>
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@ -346,7 +346,7 @@ unsigned long get_board_ddr_clk(void);
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"initrd_high=0xffffffffffffffff\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"kernel_start=0x581100000\0" \
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"kernel_start=0x581100000\0" \
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"kernel_load=0xa0000000\0" \
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"kernel_load=0xa0000000\0" \
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"kernel_size=0x28000000\0"
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"kernel_size=0x2800000\0"
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#ifdef CONFIG_FSL_MC_ENET
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#ifdef CONFIG_FSL_MC_ENET
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#define CONFIG_FSL_MEMAC
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#define CONFIG_FSL_MEMAC
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