From 9515e41d38cc81046c9bc5c766552ce5e278b263 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Thu, 26 Dec 2019 13:46:27 +0300 Subject: [PATCH 1/7] ARC: nSIM: switch from ARC UART to DW UART Since v2019.06 DesingWare nSIM supports DesignWare UART simulation and so we may switch from pretty unusual ARC UART to much more standard DesignWare UART (which in case of U-Boot is just an ordinary 16650 UART). This among other things makes built dinaries compatible with our other platforms to name a few: FPGA-based HAPS boards, QEMU and even ZeBU. Signed-off-by: Alexey Brodkin --- arch/arc/dts/nsim.dts | 12 +++++++----- configs/nsim_700_defconfig | 8 ++++---- configs/nsim_700be_defconfig | 8 ++++---- configs/nsim_hs38_defconfig | 8 ++++---- configs/nsim_hs38be_defconfig | 8 ++++---- 5 files changed, 23 insertions(+), 21 deletions(-) diff --git a/arch/arc/dts/nsim.dts b/arch/arc/dts/nsim.dts index 243ecb178e..43f281dfec 100644 --- a/arch/arc/dts/nsim.dts +++ b/arch/arc/dts/nsim.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com) + * Copyright (C) 2015-2016, 2020 Synopsys, Inc. (www.synopsys.com) */ /dts-v1/; @@ -10,7 +10,7 @@ model = "snps,nsim"; aliases { - console = &arcuart0; + console = &uart0; }; cpu_card { @@ -22,9 +22,11 @@ }; }; - arcuart0: serial@0xc0fc1000 { - compatible = "snps,arc-uart"; - reg = <0xc0fc1000 0x100>; + uart0: serial@f0000000 { + compatible = "snps,dw-apb-uart"; + reg = <0xf0000000 0x1000>; + reg-shift = <2>; + reg-io-width = <4>; clock-frequency = <70000000>; }; diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 5633113b09..2d4a58b178 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -1,13 +1,13 @@ CONFIG_ARC=y CONFIG_TARGET_NSIM=y CONFIG_SYS_TEXT_BASE=0x81000000 -CONFIG_DEBUG_UART_BASE=0xc0fc1000 +CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyARC0,115200n8" +CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y @@ -16,6 +16,6 @@ CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DM_SERIAL=y -CONFIG_DEBUG_ARC_SERIAL=y -CONFIG_ARC_SERIAL=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 40f7ec7e1f..61eea91449 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -2,13 +2,13 @@ CONFIG_ARC=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y CONFIG_SYS_TEXT_BASE=0x81000000 -CONFIG_DEBUG_UART_BASE=0xc0fc1000 +CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyARC0,115200n8" +CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y @@ -17,6 +17,6 @@ CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DM_SERIAL=y -CONFIG_DEBUG_ARC_SERIAL=y -CONFIG_ARC_SERIAL=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 2820a6fca3..ce68de3251 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -2,13 +2,13 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_TARGET_NSIM=y CONFIG_SYS_TEXT_BASE=0x81000000 -CONFIG_DEBUG_UART_BASE=0xc0fc1000 +CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyARC0,115200n8" +CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y @@ -17,6 +17,6 @@ CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DM_SERIAL=y -CONFIG_DEBUG_ARC_SERIAL=y -CONFIG_ARC_SERIAL=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index e533fae2b1..5d2ea59d52 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -3,13 +3,13 @@ CONFIG_ISA_ARCV2=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y CONFIG_SYS_TEXT_BASE=0x81000000 -CONFIG_DEBUG_UART_BASE=0xc0fc1000 +CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyARC0,115200n8" +CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y @@ -18,6 +18,6 @@ CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DM_SERIAL=y -CONFIG_DEBUG_ARC_SERIAL=y -CONFIG_ARC_SERIAL=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y CONFIG_USE_PRIVATE_LIBGCC=y From 1a1383f3678212dd126a2e088b14654bd106ec4c Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Thu, 26 Dec 2019 13:52:07 +0300 Subject: [PATCH 2/7] ARC: nsim_{700|700be|hs38be}_defconfigs: Disable networking We don't have yet any brc700 or big-enadian platforms with networking support to run this particular configuration. Whenever QEMU for ARC supports arc700 or big-endian targets we may revisit this one. Signed-off-by: Alexey Brodkin --- configs/nsim_700_defconfig | 1 + configs/nsim_700be_defconfig | 1 + configs/nsim_hs38be_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 2d4a58b178..6a38e2c246 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set CONFIG_DM=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 61eea91449..d3ed84a415 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set CONFIG_DM=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 5d2ea59d52..b074b4ca98 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set CONFIG_DM=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 From 95f7103f943bff243df46592eca5dcb8957ab0ba Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Thu, 26 Dec 2019 14:47:42 +0300 Subject: [PATCH 3/7] ARC: nsim_hs38: Add support of Virtio NET & BLK Given now nsim_hs38 configuration is usable on QEMU and in QEMU we have Virtio working perfectly fine the next logical step is to add support of supported & known to work net & bkl to this config. Signed-off-by: Alexey Brodkin --- arch/arc/Kconfig | 4 ++-- arch/arc/dts/nsim.dts | 24 ++++++++++++++++++++++++ board/synopsys/{ => nsim}/Kconfig | 3 +++ board/synopsys/nsim/MAINTAINERS | 6 ++++++ board/synopsys/nsim/Makefile | 7 +++++++ board/synopsys/nsim/nsim.c | 26 ++++++++++++++++++++++++++ configs/nsim_hs38_defconfig | 9 +++++++++ 7 files changed, 77 insertions(+), 2 deletions(-) rename board/synopsys/{ => nsim}/Kconfig (74%) create mode 100644 board/synopsys/nsim/MAINTAINERS create mode 100644 board/synopsys/nsim/Makefile create mode 100644 board/synopsys/nsim/nsim.c diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 0cb97207db..545fc3e243 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -160,7 +160,7 @@ config TARGET_TB100 bool "Support tb100" config TARGET_NSIM - bool "Support standalone nSIM & Free nSIM" + bool "Support ARC simulation & prototyping platforms" config TARGET_AXS101 bool "Support Synopsys Designware SDP board AXS101" @@ -184,10 +184,10 @@ config TARGET_IOT_DEVKIT endchoice source "board/abilis/tb100/Kconfig" -source "board/synopsys/Kconfig" source "board/synopsys/axs10x/Kconfig" source "board/synopsys/emsdp/Kconfig" source "board/synopsys/hsdk/Kconfig" source "board/synopsys/iot_devkit/Kconfig" +source "board/synopsys/nsim/Kconfig" endmenu diff --git a/arch/arc/dts/nsim.dts b/arch/arc/dts/nsim.dts index 43f281dfec..c2899ef2ea 100644 --- a/arch/arc/dts/nsim.dts +++ b/arch/arc/dts/nsim.dts @@ -30,4 +30,28 @@ clock-frequency = <70000000>; }; + virtio0: virtio@f0100000 { + compatible = "virtio,mmio"; + reg = <0xf0100000 0x2000>; + }; + + virtio1: virtio@f0102000 { + compatible = "virtio,mmio"; + reg = <0xf0102000 0x2000>; + }; + + virtio2: virtio@f0104000 { + compatible = "virtio,mmio"; + reg = <0xf0104000 0x2000>; + }; + + virtio3: virtio@f0106000 { + compatible = "virtio,mmio"; + reg = <0xf0106000 0x2000>; + }; + + virtio4: virtio@f0108000 { + compatible = "virtio,mmio"; + reg = <0xf0108000 0x2000>; + }; }; diff --git a/board/synopsys/Kconfig b/board/synopsys/nsim/Kconfig similarity index 74% rename from board/synopsys/Kconfig rename to board/synopsys/nsim/Kconfig index 27e5509b26..22287032bf 100644 --- a/board/synopsys/Kconfig +++ b/board/synopsys/nsim/Kconfig @@ -1,5 +1,8 @@ if TARGET_NSIM +config SYS_BOARD + default "nsim" + config SYS_VENDOR default "synopsys" diff --git a/board/synopsys/nsim/MAINTAINERS b/board/synopsys/nsim/MAINTAINERS new file mode 100644 index 0000000000..ad23c8338e --- /dev/null +++ b/board/synopsys/nsim/MAINTAINERS @@ -0,0 +1,6 @@ +ARC SIMULATION & PROTOTYPING PLATFORMS +M: Alexey Brodkin +S: Maintained +F: arch/arc/dts/nsim.dts +F: board/synopsys/nsim/ +F: configs/nsim_*_defconfig diff --git a/board/synopsys/nsim/Makefile b/board/synopsys/nsim/Makefile new file mode 100644 index 0000000000..6aaffffa73 --- /dev/null +++ b/board/synopsys/nsim/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2020 Synopsys, Inc. All rights reserved. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += nsim.o diff --git a/board/synopsys/nsim/nsim.c b/board/synopsys/nsim/nsim.c new file mode 100644 index 0000000000..f384f707f6 --- /dev/null +++ b/board/synopsys/nsim/nsim.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Synopsys, Inc. All rights reserved. + */ + +#include +#include +#include +#include + +int board_early_init_r(void) +{ + /* + * Make sure virtio bus is enumerated so that peripherals + * on the virtio bus can be discovered by their drivers + */ + virtio_init(); + + return 0; +} + +int checkboard(void) +{ + printf("Board: ARC virtual or prototyping platform\n"); + return 0; +}; diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index ce68de3251..6cd01a505b 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -9,14 +9,23 @@ CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" +CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="nsim# " +CONFIG_CMD_DM=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y +CONFIG_BLK=y +CONFIG_HAVE_BLOCK_DEVICE=y +CONFIG_DM_ETH=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y CONFIG_USE_PRIVATE_LIBGCC=y From b8f3ce013700893a3ed4ae280a2aec0ab95af3de Mon Sep 17 00:00:00 2001 From: Eugeniy Paltsev Date: Wed, 29 Jan 2020 14:08:29 +0300 Subject: [PATCH 4/7] CLK: HSDK: Check for PLL bypass firstly Pll bypass has priority over enable/disable. Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin --- drivers/clk/clk-hsdk-cgu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c index 56ef08c032..69e6b24b66 100644 --- a/drivers/clk/clk-hsdk-cgu.c +++ b/drivers/clk/clk-hsdk-cgu.c @@ -377,14 +377,14 @@ static ulong pll_get(struct clk *sclk) pr_debug("current configurarion: %#x\n", val); - /* Check if PLL is disabled */ - if (val & CGU_PLL_CTRL_PD) - return 0; - /* Check if PLL is bypassed */ if (val & CGU_PLL_CTRL_BYPASS) return PARENT_RATE; + /* Check if PLL is disabled */ + if (val & CGU_PLL_CTRL_PD) + return 0; + /* input divider = reg.idiv + 1 */ idiv = 1 + ((val & CGU_PLL_CTRL_IDIV_MASK) >> CGU_PLL_CTRL_IDIV_SHIFT); /* fb divider = 2*(reg.fbdiv + 1) */ From defd1e71d0e0eaa1af92cadc4a9699830e2f89fc Mon Sep 17 00:00:00 2001 From: Eugeniy Paltsev Date: Wed, 29 Jan 2020 14:08:30 +0300 Subject: [PATCH 5/7] CLK: HSDK: fix HDMI clock calculation HDMI PLL has its own xtal with 27 MHz output but we treat it the same way as other PLLs with 33.33 MHz input. Fix that. Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin --- drivers/clk/clk-hsdk-cgu.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c index 69e6b24b66..4637b9fdf1 100644 --- a/drivers/clk/clk-hsdk-cgu.c +++ b/drivers/clk/clk-hsdk-cgu.c @@ -46,17 +46,21 @@ * | |-->|CGU_TUN_IDIV_ROM|-----------> * | |-->|CGU_TUN_IDIV_PWM|-----------> * | - * | ------------ - * |-->| HDMI PLL | - * | ------------ - * | | - * | |-->|CGU_HDMI_IDIV_APB|------> - * | * | ----------- * |-->| DDR PLL | * ----------- * | * |----------------------------> + * + * ------------------ + * | 27.00 MHz xtal | + * ------------------ + * | + * | ------------ + * |-->| HDMI PLL | + * ------------ + * | + * |-->|CGU_HDMI_IDIV_APB|------> */ #define CGU_ARC_IDIV 0x080 @@ -117,7 +121,8 @@ #define CREG_CORE_IF_CLK_DIV_2 0x1 #define MIN_PLL_RATE 100000000 /* 100 MHz */ -#define PARENT_RATE 33333333 /* fixed clock - xtal */ +#define PARENT_RATE_33 33333333 /* fixed clock - xtal */ +#define PARENT_RATE_27 27000000 /* fixed clock - xtal */ #define CGU_MAX_CLOCKS 26 #define CGU_SYS_CLOCKS 16 @@ -237,6 +242,7 @@ struct hsdk_cgu_clk { }; struct hsdk_pll_devdata { + const u32 parent_rate; const struct hsdk_pll_cfg *pll_cfg; int (*update_rate)(struct hsdk_cgu_clk *clk, unsigned long rate, const struct hsdk_pll_cfg *cfg); @@ -248,16 +254,19 @@ static int hsdk_pll_comm_update_rate(struct hsdk_cgu_clk *, unsigned long, const struct hsdk_pll_cfg *); static const struct hsdk_pll_devdata core_pll_dat = { + .parent_rate = PARENT_RATE_33, .pll_cfg = asdt_pll_cfg, .update_rate = hsdk_pll_core_update_rate, }; static const struct hsdk_pll_devdata sdt_pll_dat = { + .parent_rate = PARENT_RATE_33, .pll_cfg = asdt_pll_cfg, .update_rate = hsdk_pll_comm_update_rate, }; static const struct hsdk_pll_devdata hdmi_pll_dat = { + .parent_rate = PARENT_RATE_27, .pll_cfg = hdmi_pll_cfg, .update_rate = hsdk_pll_comm_update_rate, }; @@ -372,6 +381,7 @@ static ulong pll_get(struct clk *sclk) u64 rate; u32 idiv, fbdiv, odiv; struct hsdk_cgu_clk *clk = dev_get_priv(sclk->dev); + u32 parent_rate = clk->pll_devdata->parent_rate; val = hsdk_pll_read(clk, CGU_PLL_CTRL); @@ -379,7 +389,7 @@ static ulong pll_get(struct clk *sclk) /* Check if PLL is bypassed */ if (val & CGU_PLL_CTRL_BYPASS) - return PARENT_RATE; + return parent_rate; /* Check if PLL is disabled */ if (val & CGU_PLL_CTRL_PD) @@ -392,7 +402,7 @@ static ulong pll_get(struct clk *sclk) /* output divider = 2^(reg.odiv) */ odiv = 1 << ((val & CGU_PLL_CTRL_ODIV_MASK) >> CGU_PLL_CTRL_ODIV_SHIFT); - rate = (u64)PARENT_RATE * fbdiv; + rate = (u64)parent_rate * fbdiv; do_div(rate, idiv * odiv); return rate; @@ -490,7 +500,8 @@ static ulong pll_set(struct clk *sclk, ulong rate) } } - pr_err("invalid rate=%ld Hz, parent_rate=%d Hz\n", best_rate, PARENT_RATE); + pr_err("invalid rate=%ld Hz, parent_rate=%d Hz\n", best_rate, + clk->pll_devdata->parent_rate); return -EINVAL; } From c77bbc221547b9820b801dc6435451fa45ecec26 Mon Sep 17 00:00:00 2001 From: Eugeniy Paltsev Date: Wed, 12 Feb 2020 14:23:54 +0300 Subject: [PATCH 6/7] ARC: rework setting of ARC CPU specific compiler options It's a very rare if at all existing occasion when ARC CPU template is used as is w/o any changes - in the end it's a beauty and competitive advantage of ARC cores to be tailored for a particular use-case - and so it doesn't make a lot of sense to offer template-based "-mcpu" selection. Given for each and every platform we end-up adding quite a few more flags it's logical to move "-mcpu" selection to platform's definition as well which we exactly do here. Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin --- arch/arc/config.mk | 20 -------------------- board/abilis/tb100/config.mk | 5 +++++ board/synopsys/axs10x/config.mk | 6 ++++++ board/synopsys/emsdp/config.mk | 2 +- board/synopsys/hsdk/config.mk | 4 ++++ board/synopsys/iot_devkit/config.mk | 3 ++- board/synopsys/nsim/Kconfig | 9 +++++++++ board/synopsys/nsim/config.mk | 8 ++++++++ configs/nsim_700_defconfig | 1 + configs/nsim_700be_defconfig | 1 + configs/nsim_hs38_defconfig | 1 + configs/nsim_hs38be_defconfig | 1 + 12 files changed, 39 insertions(+), 22 deletions(-) create mode 100644 board/abilis/tb100/config.mk create mode 100644 board/synopsys/nsim/config.mk diff --git a/arch/arc/config.mk b/arch/arc/config.mk index 18005d9993..6fa29adae8 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -22,26 +22,6 @@ ifdef CONFIG_ARC_MMU_VER CONFIG_MMU = 1 endif -ifdef CONFIG_CPU_ARC750D -PLATFORM_CPPFLAGS += -mcpu=arc700 -endif - -ifdef CONFIG_CPU_ARC770D -PLATFORM_CPPFLAGS += -mcpu=arc700 -mlock -mswape -endif - -ifdef CONFIG_CPU_ARCEM6 -PLATFORM_CPPFLAGS += -mcpu=arcem -endif - -ifdef CONFIG_CPU_ARCHS34 -PLATFORM_CPPFLAGS += -mcpu=archs -endif - -ifdef CONFIG_CPU_ARCHS38 -PLATFORM_CPPFLAGS += -mcpu=archs -endif - PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -fno-common diff --git a/board/abilis/tb100/config.mk b/board/abilis/tb100/config.mk new file mode 100644 index 0000000000..9e8dee49bd --- /dev/null +++ b/board/abilis/tb100/config.mk @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2020 Synopsys, Inc. All rights reserved. + +PLATFORM_CPPFLAGS += -mcpu=arc700 -mlock -mswape diff --git a/board/synopsys/axs10x/config.mk b/board/synopsys/axs10x/config.mk index 81ff498f81..ccac544290 100644 --- a/board/synopsys/axs10x/config.mk +++ b/board/synopsys/axs10x/config.mk @@ -2,6 +2,12 @@ # # Copyright (C) 2018 Synopsys, Inc. All rights reserved. +ifdef CONFIG_TARGET_AXS103 + PLATFORM_CPPFLAGS += -mcpu=archs +else + PLATFORM_CPPFLAGS += -mcpu=arc700 -mlock -mswape +endif + bsp-generate: u-boot u-boot.bin ifdef CONFIG_ISA_ARCV2 $(Q)python3 $(srctree)/board/$(BOARDDIR)/headerize-axs.py \ diff --git a/board/synopsys/emsdp/config.mk b/board/synopsys/emsdp/config.mk index 67fd7bf82a..5bd10442af 100644 --- a/board/synopsys/emsdp/config.mk +++ b/board/synopsys/emsdp/config.mk @@ -1,2 +1,2 @@ -PLATFORM_CPPFLAGS += -mlittle-endian -mnorm -mswap -mmpy-option=3 \ +PLATFORM_CPPFLAGS += -mcpu=arcem -mlittle-endian -mnorm -mswap -mmpy-option=3 \ -mbarrel-shifter -mfpu=fpuda_all -mcode-density diff --git a/board/synopsys/hsdk/config.mk b/board/synopsys/hsdk/config.mk index 9e280f921a..5ae22fa2b7 100644 --- a/board/synopsys/hsdk/config.mk +++ b/board/synopsys/hsdk/config.mk @@ -2,6 +2,10 @@ # # Copyright (C) 2018 Synopsys, Inc. All rights reserved. +PLATFORM_CPPFLAGS += -mcpu=hs38_linux -mlittle-endian -matomic -mll64 \ + -mdiv-rem -mswap -mnorm -mmpy-option=9 -mbarrel-shifter \ + -mfpu=fpud_all + bsp-generate: u-boot u-boot.bin $(Q)python3 $(srctree)/board/$(BOARDDIR)/headerize-hsdk.py \ --arc-id 0x52 --image $(srctree)/u-boot.bin \ diff --git a/board/synopsys/iot_devkit/config.mk b/board/synopsys/iot_devkit/config.mk index 120733538a..bd8f09ec7a 100644 --- a/board/synopsys/iot_devkit/config.mk +++ b/board/synopsys/iot_devkit/config.mk @@ -1,2 +1,3 @@ -PLATFORM_CPPFLAGS += -mlittle-endian -mcode-density -mdiv-rem -mswap -mnorm -mmpy-option=6 -mbarrel-shifter +PLATFORM_CPPFLAGS += -mcpu=arcem -mlittle-endian -mcode-density -mdiv-rem \ + -mswap -mnorm -mmpy-option=6 -mbarrel-shifter LDSCRIPT = $(srctree)/board/synopsys/iot_devkit/u-boot.lds diff --git a/board/synopsys/nsim/Kconfig b/board/synopsys/nsim/Kconfig index 22287032bf..b6966b2991 100644 --- a/board/synopsys/nsim/Kconfig +++ b/board/synopsys/nsim/Kconfig @@ -9,4 +9,13 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "nsim" +config NSIM_BOARD_CPPFLAGS + string "board arc-specific compiler options" + help + For nSIM we allow to set custom arc-specific compiler options + (like -mcpu=) instead of hardcoding them in its makefile as nSIM + target is used for representing targets without fixed CPU version + like FPGA-based boards and software simulators. + This variable takes space separated compiler options list. + endif diff --git a/board/synopsys/nsim/config.mk b/board/synopsys/nsim/config.mk new file mode 100644 index 0000000000..40f9578a25 --- /dev/null +++ b/board/synopsys/nsim/config.mk @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2020 Synopsys, Inc. All rights reserved. + +# CONFIG_NSIM_BOARD_CPPFLAGS is a string variable which comes from defconfig +# with double quotes. We use echo to remove them so CONFIG_NSIM_BOARD_CPPFLAGS +# won't be treated by compiler as a single option. +PLATFORM_CPPFLAGS += $(shell echo $(CONFIG_NSIM_BOARD_CPPFLAGS)) diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 6a38e2c246..5e89769784 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -1,5 +1,6 @@ CONFIG_ARC=y CONFIG_TARGET_NSIM=y +CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape" CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index d3ed84a415..0391271248 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -1,6 +1,7 @@ CONFIG_ARC=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y +CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape" CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 6cd01a505b..910c2ce224 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -1,6 +1,7 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_TARGET_NSIM=y +CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs" CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index b074b4ca98..72472afb2b 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -2,6 +2,7 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y +CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs" CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 From 07906b3dad157bd58411664bcc6a2a7976d5e0a9 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Mon, 20 Jan 2020 13:37:38 +0300 Subject: [PATCH 7/7] ARC: Switch to generic accessors First of all U-Boot is not that performance oriented as real run-time software like OS or user bare-metal app so we may afford being not super fast as we only being executed once. That in return allows us to be more universal and support wider variety of devices. And looking forward that will significantly reduce maintenance and simplify support of newer architectures. And while at it we add quad-word accessors like readq(), writeq() etc. Signed-off-by: Alexey Brodkin --- arch/arc/include/asm/io.h | 212 ++++++++++++++------------------------ 1 file changed, 79 insertions(+), 133 deletions(-) diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h index fa844b54f4..70d050590d 100644 --- a/arch/arc/include/asm/io.h +++ b/arch/arc/include/asm/io.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * Copyright (C) 2013-2014, 2020 Synopsys, Inc. All rights reserved. */ #ifndef __ASM_ARC_IO_H @@ -54,134 +54,97 @@ static inline void sync(void) /* Not yet implemented */ } -static inline u8 __raw_readb(const volatile void __iomem *addr) -{ - u8 b; +#define __arch_getb(a) (*(unsigned char *)(a)) +#define __arch_getw(a) (*(unsigned short *)(a)) +#define __arch_getl(a) (*(unsigned int *)(a)) +#define __arch_getq(a) (*(unsigned long long *)(a)) - __asm__ __volatile__("ldb%U1 %0, %1\n" - : "=r" (b) - : "m" (*(volatile u8 __force *)addr) - : "memory"); - return b; +#define __arch_putb(v, a) (*(unsigned char *)(a) = (v)) +#define __arch_putw(v, a) (*(unsigned short *)(a) = (v)) +#define __arch_putl(v, a) (*(unsigned int *)(a) = (v)) +#define __arch_putq(v, a) (*(unsigned long long *)(a) = (v)) + +#define __raw_writeb(v, a) __arch_putb(v, a) +#define __raw_writew(v, a) __arch_putw(v, a) +#define __raw_writel(v, a) __arch_putl(v, a) +#define __raw_writeq(v, a) __arch_putq(v, a) + +#define __raw_readb(a) __arch_getb(a) +#define __raw_readw(a) __arch_getw(a) +#define __raw_readl(a) __arch_getl(a) +#define __raw_readq(a) __arch_getq(a) + +static inline void __raw_writesb(unsigned long addr, const void *data, + int bytelen) +{ + u8 *buf = (uint8_t *)data; + + while (bytelen--) + __arch_putb(*buf++, addr); } -static inline u16 __raw_readw(const volatile void __iomem *addr) +static inline void __raw_writesw(unsigned long addr, const void *data, + int wordlen) { - u16 s; + u16 *buf = (uint16_t *)data; - __asm__ __volatile__("ldw%U1 %0, %1\n" - : "=r" (s) - : "m" (*(volatile u16 __force *)addr) - : "memory"); - return s; + while (wordlen--) + __arch_putw(*buf++, addr); } -static inline u32 __raw_readl(const volatile void __iomem *addr) +static inline void __raw_writesl(unsigned long addr, const void *data, + int longlen) { - u32 w; + u32 *buf = (uint32_t *)data; - __asm__ __volatile__("ld%U1 %0, %1\n" - : "=r" (w) - : "m" (*(volatile u32 __force *)addr) - : "memory"); - return w; + while (longlen--) + __arch_putl(*buf++, addr); } -static inline void __raw_writeb(u8 b, volatile void __iomem *addr) +static inline void __raw_readsb(unsigned long addr, void *data, int bytelen) { - __asm__ __volatile__("stb%U1 %0, %1\n" - : - : "r" (b), "m" (*(volatile u8 __force *)addr) - : "memory"); + u8 *buf = (uint8_t *)data; + + while (bytelen--) + *buf++ = __arch_getb(addr); } -static inline void __raw_writew(u16 s, volatile void __iomem *addr) +static inline void __raw_readsw(unsigned long addr, void *data, int wordlen) { - __asm__ __volatile__("stw%U1 %0, %1\n" - : - : "r" (s), "m" (*(volatile u16 __force *)addr) - : "memory"); + u16 *buf = (uint16_t *)data; + + while (wordlen--) + *buf++ = __arch_getw(addr); } -static inline void __raw_writel(u32 w, volatile void __iomem *addr) +static inline void __raw_readsl(unsigned long addr, void *data, int longlen) { - __asm__ __volatile__("st%U1 %0, %1\n" - : - : "r" (w), "m" (*(volatile u32 __force *)addr) - : "memory"); + u32 *buf = (uint32_t *)data; + + while (longlen--) + *buf++ = __arch_getl(addr); } -static inline int __raw_readsb(unsigned int addr, void *data, int bytelen) -{ - __asm__ __volatile__ ("1:ld.di r8, [r0]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "stb.ab r8, [r1, 1]\n" - : - : "r" (addr), "r" (data), "r" (bytelen) - : "r8"); - return bytelen; -} +/* + * Relaxed I/O memory access primitives. These follow the Device memory + * ordering rules but do not guarantee any ordering relative to Normal memory + * accesses. + */ +#define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; }) +#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ + __raw_readw(c)); __r; }) +#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ + __raw_readl(c)); __r; }) +#define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64) \ + __raw_readq(c)); __r; }) -static inline int __raw_readsw(unsigned int addr, void *data, int wordlen) -{ - __asm__ __volatile__ ("1:ld.di r8, [r0]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "stw.ab r8, [r1, 2]\n" - : - : "r" (addr), "r" (data), "r" (wordlen) - : "r8"); - return wordlen; -} - -static inline int __raw_readsl(unsigned int addr, void *data, int longlen) -{ - __asm__ __volatile__ ("1:ld.di r8, [r0]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "st.ab r8, [r1, 4]\n" - : - : "r" (addr), "r" (data), "r" (longlen) - : "r8"); - return longlen; -} - -static inline int __raw_writesb(unsigned int addr, void *data, int bytelen) -{ - __asm__ __volatile__ ("1:ldb.ab r8, [r1, 1]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "st.di r8, [r0, 0]\n" - : - : "r" (addr), "r" (data), "r" (bytelen) - : "r8"); - return bytelen; -} - -static inline int __raw_writesw(unsigned int addr, void *data, int wordlen) -{ - __asm__ __volatile__ ("1:ldw.ab r8, [r1, 2]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "st.ab.di r8, [r0, 0]\n" - : - : "r" (addr), "r" (data), "r" (wordlen) - : "r8"); - return wordlen; -} - -static inline int __raw_writesl(unsigned int addr, void *data, int longlen) -{ - __asm__ __volatile__ ("1:ld.ab r8, [r1, 4]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "st.ab.di r8, [r0, 0]\n" - : - : "r" (addr), "r" (data), "r" (longlen) - : "r8"); - return longlen; -} +#define writeb_relaxed(v, c) ((void)__raw_writeb((v), (c))) +#define writew_relaxed(v, c) ((void)__raw_writew((__force u16) \ + cpu_to_le16(v), (c))) +#define writel_relaxed(v, c) ((void)__raw_writel((__force u32) \ + cpu_to_le32(v), (c))) +#define writeq_relaxed(v, c) ((void)__raw_writeq((__force u64) \ + cpu_to_le64(v), (c))) /* * MMIO can also get buffered/optimized in micro-arch, so barriers needed @@ -195,32 +158,15 @@ static inline int __raw_writesl(unsigned int addr, void *data, int longlen) * * http://lkml.kernel.org/r/20150622133656.GG1583@arm.com */ -#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) -#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) -#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) +#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) +#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) +#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) +#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v; }) -#define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) -#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) -#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) - -/* - * Relaxed API for drivers which can handle barrier ordering themselves - * - * Also these are defined to perform little endian accesses. - * To provide the typical device register semantics of fixed endian, - * swap the byte order for Big Endian - * - * http://lkml.kernel.org/r/201603100845.30602.arnd@arndb.de - */ -#define readb_relaxed(c) __raw_readb(c) -#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ - __raw_readw(c)); __r; }) -#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ - __raw_readl(c)); __r; }) - -#define writeb_relaxed(v,c) __raw_writeb(v,c) -#define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c) -#define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c) +#define writeb(v, c) ({ __iowmb(); writeb_relaxed(v, c); }) +#define writew(v, c) ({ __iowmb(); writew_relaxed(v, c); }) +#define writel(v, c) ({ __iowmb(); writel_relaxed(v, c); }) +#define writeq(v, c) ({ __iowmb(); writeq_relaxed(v, c); }) #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))