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ARM: am33xx: Inhibit re-initialization of DDR during RTC-only
This inhibits the re-inititialization of DDR during an RTC-only resume. If this is not done, an L3 NOC error is produced as the DDR gets accessed before the re-init has time to complete. Tested on AM437x GP EVM. Signed-off-by: Russ Dill <Russ.Dill@ti.com> [j-keerthy@ti.com Ported to Latest Master branch] Signed-off-by: Keerthy <j-keerthy@ti.com>
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e18945ad22
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025a0d40e1
2 changed files with 30 additions and 2 deletions
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@ -68,6 +68,9 @@
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#define PRM_RSTCTRL_RESET 0x01
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#define PRM_RSTCTRL_RESET 0x01
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#define PRM_RSTST_WARM_RESET_MASK 0x232
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#define PRM_RSTST_WARM_RESET_MASK 0x232
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/* EMIF Control register bits */
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#define EMIF_CTRL_DEVOFF BIT(0)
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#ifndef __KERNEL_STRICT_NAMES
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#ifndef __KERNEL_STRICT_NAMES
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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#include <asm/ti-common/omap_wdt.h>
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#include <asm/ti-common/omap_wdt.h>
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@ -386,8 +389,19 @@ struct cm_device_inst {
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};
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};
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struct prm_device_inst {
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struct prm_device_inst {
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unsigned int prm_rstctrl;
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unsigned int rstctrl;
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unsigned int prm_rstst;
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unsigned int rstst;
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unsigned int rsttime;
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unsigned int sram_count;
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unsigned int ldo_sram_core_set; /* offset 0x10 */
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unsigned int ldo_sram_core_ctr;
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unsigned int ldo_sram_mpu_setu;
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unsigned int ldo_sram_mpu_ctrl;
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unsigned int io_count; /* offset 0x20 */
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unsigned int io_pmctrl;
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unsigned int vc_val_bypass;
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unsigned int resv1;
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unsigned int emif_ctrl; /* offset 0x30 */
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};
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};
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struct cm_dpll {
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struct cm_dpll {
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@ -376,6 +376,9 @@ static void watchdog_disable(void)
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static void rtc_only(void)
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static void rtc_only(void)
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{
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{
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struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE;
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struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE;
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struct prm_device_inst *prm_device =
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(struct prm_device_inst *)PRM_DEVICE_INST;
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u32 scratch1;
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u32 scratch1;
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void (*resume_func)(void);
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void (*resume_func)(void);
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@ -403,9 +406,20 @@ static void rtc_only(void)
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*/
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*/
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rtc_only_update_board_type(scratch1 >> RTC_BOARD_TYPE_SHIFT);
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rtc_only_update_board_type(scratch1 >> RTC_BOARD_TYPE_SHIFT);
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/*
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* Enable EMIF_DEVOFF in PRCM_PRM_EMIF_CTRL to indicate to EMIF we
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* are resuming from self-refresh. This avoids an unnecessary re-init
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* of the DDR. The re-init takes time and we would need to wait for
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* it to complete before accessing DDR to avoid L3 NOC errors.
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*/
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writel(EMIF_CTRL_DEVOFF, &prm_device->emif_ctrl);
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rtc_only_prcm_init();
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rtc_only_prcm_init();
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sdram_init();
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sdram_init();
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/* Disable EMIF_DEVOFF for normal operation and to exit self-refresh */
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writel(0, &prm_device->emif_ctrl);
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resume_func = (void *)readl(&rtc->scratch0);
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resume_func = (void *)readl(&rtc->scratch0);
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if (resume_func)
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if (resume_func)
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resume_func();
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resume_func();
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