README.fsl-ddr typos and update to reflect hotkey

Documentation fix to README.fsl-ddr to fix typos and
to reflect use of 'd' hotkey to enter the FSL DDR debugger.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
James Yang 2013-01-04 08:14:03 +00:00 committed by Andy Fleming
parent 5926ee3800
commit 02a9ce7187

View file

@ -263,17 +263,21 @@ Reference http://www.samsung.com/global/business/semiconductor/products/dram/dow
Interactive DDR debugging Interactive DDR debugging
=========================== ===========================
For DDR parameter tuning up and debugging, the interactive DDR debugging can For DDR parameter tuning up and debugging, the interactive DDR debugger can
be activated by saving an environment variable "ddr_interactive". The value be activated by setting the environment variable "ddr_interactive" to any
doesn't matter. Once activated, U-boot prompts "FSL DDR>" before enabling DDR value. (The value of ddr_interactive may have a meaning in the future, but,
controller. The available commands can be seen by typing "help". for now, the presence of the variable will cause the debugger to run.) Once
activated, U-boot will show the prompt "FSL DDR>" before enabling the DDR
controller. The available commands are printed by typing "help".
Another way to enter debug mode without using environment variable is to send Another way to enter the interactive DDR debugger without setting the
a key press during boot, like one would do to abort auto boot. To save booting environment variable is to send the 'd' character early during the boot
time, no additioal delay is added so the window to send the key press is very process. To save booting time, no additional delay is added, so the window
short. For example, user can send the key press using reset command followed by to send the key press is very short -- basically, it is the time before the
hitting enter key twice. In case of power on reset, user can keep hitting any memory controller code starts to run. For example, when rebooting from
key while applying the power. within u-boot, the user must press 'd' IMMEDIATELY after hitting enter to
initiate a 'reset' command. In case of power on/reset, the user can hold
down the 'd' key while applying power or hitting the board's reset button.
The example flow of using interactive debugging is The example flow of using interactive debugging is
type command "compute" to calculate the parameters from the default type command "compute" to calculate the parameters from the default
@ -281,13 +285,16 @@ type command "print" with arguments to show SPD, options, registers
type command "edit" with arguments to change any if desired type command "edit" with arguments to change any if desired
type command "copy" with arguments to copy controller/dimm settings type command "copy" with arguments to copy controller/dimm settings
type command "go" to continue calculation and enable DDR controller type command "go" to continue calculation and enable DDR controller
Additional commands to restart the debugging are:
type command "reset" to reset the board type command "reset" to reset the board
type command "recompute" to reload SPD and start over type command "recompute" to reload SPD and start over
Note, check "next_step" to show the flow. For example, after edit opts, the Note, check "next_step" to show the flow. For example, after edit opts, the
next_step is STEP_ASSIGN_ADDRESSES. After editing registers, the next_step is next_step is STEP_ASSIGN_ADDRESSES. After editing registers, the next_step is
STEP_PROGRAM_REGS. Upon issuing command "go", DDR controller will be enabled STEP_PROGRAM_REGS. Upon issuing command "go", the debugger will program the
with current setting without further calculation. DDR controller with the current setting without further calculation and then
exit to resume the booting of the machine.
The detail syntax for each commands are The detail syntax for each commands are
@ -340,7 +347,7 @@ Examples of debugging flow
FSL DDR>compute FSL DDR>compute
Detected UDIMM UG51U6400N8SU-ACF Detected UDIMM UG51U6400N8SU-ACF
SL DDR>print FSL DDR>print
print [c<n>] [d<n>] [spd] [dimmparms] [commonparms] [opts] [addresses] [regs] print [c<n>] [d<n>] [spd] [dimmparms] [commonparms] [opts] [addresses] [regs]
FSL DDR>print dimmparms FSL DDR>print dimmparms
DIMM parameters: Controller=0 DIMM=0 DIMM parameters: Controller=0 DIMM=0