mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-21 06:31:31 +00:00
Merge git://git.denx.de/u-boot-sh
This commit is contained in:
commit
02b0895c21
6 changed files with 44 additions and 21 deletions
|
@ -8,3 +8,7 @@
|
||||||
|
|
||||||
#include "r8a7791-porter.dts"
|
#include "r8a7791-porter.dts"
|
||||||
#include "r8a7791-u-boot.dtsi"
|
#include "r8a7791-u-boot.dtsi"
|
||||||
|
|
||||||
|
&scif0 {
|
||||||
|
u-boot,dm-pre-reloc;
|
||||||
|
};
|
||||||
|
|
|
@ -214,7 +214,6 @@
|
||||||
&scif0 {
|
&scif0 {
|
||||||
pinctrl-0 = <&scif0_pins>;
|
pinctrl-0 = <&scif0_pins>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
u-boot,dm-pre-reloc;
|
|
||||||
|
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
@ -352,6 +351,11 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&i2c6 {
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
};
|
||||||
|
|
||||||
&sata0 {
|
&sata0 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
|
@ -65,11 +65,19 @@ int board_early_init_f(void)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#define ETHERNET_PHY_RESET 176 /* GPIO 5 22 */
|
||||||
|
|
||||||
int board_init(void)
|
int board_init(void)
|
||||||
{
|
{
|
||||||
/* adress of boot parameters */
|
/* adress of boot parameters */
|
||||||
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
|
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
|
||||||
|
|
||||||
|
/* Force ethernet PHY out of reset */
|
||||||
|
gpio_request(ETHERNET_PHY_RESET, "phy_reset");
|
||||||
|
gpio_direction_output(ETHERNET_PHY_RESET, 0);
|
||||||
|
mdelay(10);
|
||||||
|
gpio_direction_output(ETHERNET_PHY_RESET, 1);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -108,12 +116,25 @@ const struct rmobile_sysinfo sysinfo = {
|
||||||
|
|
||||||
void reset_cpu(ulong addr)
|
void reset_cpu(ulong addr)
|
||||||
{
|
{
|
||||||
u8 val;
|
struct udevice *dev;
|
||||||
|
const u8 pmic_bus = 6;
|
||||||
|
const u8 pmic_addr = 0x5a;
|
||||||
|
u8 data;
|
||||||
|
int ret;
|
||||||
|
|
||||||
i2c_set_bus_num(2); /* PowerIC connected to ch2 */
|
ret = i2c_get_chip_for_busnum(pmic_bus, pmic_addr, 1, &dev);
|
||||||
i2c_read(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
|
if (ret)
|
||||||
val |= 0x02;
|
hang();
|
||||||
i2c_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
|
|
||||||
|
ret = dm_i2c_read(dev, 0x13, &data, 1);
|
||||||
|
if (ret)
|
||||||
|
hang();
|
||||||
|
|
||||||
|
data |= BIT(1);
|
||||||
|
|
||||||
|
ret = dm_i2c_write(dev, 0x13, &data, 1);
|
||||||
|
if (ret)
|
||||||
|
hang();
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_SPL_BUILD
|
#ifdef CONFIG_SPL_BUILD
|
||||||
|
|
|
@ -11,6 +11,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
|
||||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||||
CONFIG_SPL_SPI_SUPPORT=y
|
CONFIG_SPL_SPI_SUPPORT=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot"
|
CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot"
|
||||||
|
CONFIG_FIT=y
|
||||||
CONFIG_BOOTDELAY=3
|
CONFIG_BOOTDELAY=3
|
||||||
CONFIG_VERSION_VARIABLE=y
|
CONFIG_VERSION_VARIABLE=y
|
||||||
CONFIG_SPL=y
|
CONFIG_SPL=y
|
||||||
|
@ -31,6 +32,8 @@ CONFIG_CMD_USB=y
|
||||||
CONFIG_CMD_DHCP=y
|
CONFIG_CMD_DHCP=y
|
||||||
CONFIG_CMD_MII=y
|
CONFIG_CMD_MII=y
|
||||||
CONFIG_CMD_PING=y
|
CONFIG_CMD_PING=y
|
||||||
|
CONFIG_CMD_CACHE=y
|
||||||
|
CONFIG_CMD_TIME=y
|
||||||
CONFIG_CMD_EXT2=y
|
CONFIG_CMD_EXT2=y
|
||||||
CONFIG_CMD_EXT4=y
|
CONFIG_CMD_EXT4=y
|
||||||
CONFIG_CMD_EXT4_WRITE=y
|
CONFIG_CMD_EXT4_WRITE=y
|
||||||
|
@ -47,6 +50,8 @@ CONFIG_SPL_CLK=y
|
||||||
CONFIG_CLK_RENESAS=y
|
CONFIG_CLK_RENESAS=y
|
||||||
CONFIG_DM_GPIO=y
|
CONFIG_DM_GPIO=y
|
||||||
CONFIG_RCAR_GPIO=y
|
CONFIG_RCAR_GPIO=y
|
||||||
|
CONFIG_DM_I2C=y
|
||||||
|
CONFIG_SYS_I2C_RCAR_IIC=y
|
||||||
CONFIG_DM_MMC=y
|
CONFIG_DM_MMC=y
|
||||||
CONFIG_MMC_UNIPHIER=y
|
CONFIG_MMC_UNIPHIER=y
|
||||||
CONFIG_SPI_FLASH=y
|
CONFIG_SPI_FLASH=y
|
||||||
|
@ -72,4 +77,3 @@ CONFIG_DM_USB=y
|
||||||
CONFIG_USB_EHCI_HCD=y
|
CONFIG_USB_EHCI_HCD=y
|
||||||
CONFIG_USB_EHCI_PCI=y
|
CONFIG_USB_EHCI_PCI=y
|
||||||
CONFIG_USB_STORAGE=y
|
CONFIG_USB_STORAGE=y
|
||||||
CONFIG_SPL_FRAMEWORK=y
|
|
||||||
|
|
|
@ -178,7 +178,7 @@ endif
|
||||||
|
|
||||||
config SYS_I2C_RCAR_IIC
|
config SYS_I2C_RCAR_IIC
|
||||||
bool "Renesas RCar Gen3 IIC driver"
|
bool "Renesas RCar Gen3 IIC driver"
|
||||||
depends on RCAR_GEN3 && DM_I2C
|
depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
|
||||||
help
|
help
|
||||||
Support for Renesas RCar Gen3 IIC controller.
|
Support for Renesas RCar Gen3 IIC controller.
|
||||||
|
|
||||||
|
|
|
@ -49,19 +49,9 @@
|
||||||
|
|
||||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||||
|
|
||||||
/* i2c */
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||||
#define CONFIG_SYS_I2C
|
"fdt_high=0xffffffff\0" \
|
||||||
#define CONFIG_SYS_I2C_SH
|
"initrd_high=0xffffffff\0"
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
|
||||||
#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
|
|
||||||
#define CONFIG_SYS_I2C_SH_SPEED0 400000
|
|
||||||
#define CONFIG_SYS_I2C_SH_SPEED1 400000
|
|
||||||
#define CONFIG_SYS_I2C_SH_SPEED2 400000
|
|
||||||
#define CONFIG_SH_I2C_DATA_HIGH 4
|
|
||||||
#define CONFIG_SH_I2C_DATA_LOW 5
|
|
||||||
#define CONFIG_SH_I2C_CLOCK 10000000
|
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
|
|
||||||
|
|
||||||
/* SPL support */
|
/* SPL support */
|
||||||
#define CONFIG_SPL_TEXT_BASE 0xe6304000
|
#define CONFIG_SPL_TEXT_BASE 0xe6304000
|
||||||
|
|
Loading…
Add table
Reference in a new issue