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armv7: start.S: fixes and enhancements for SPL
- Allow SPL to have .bss disjoint from rest of the image - Allow for .bss setup in CONFIG_SPL_BUILD case too. - Take care of the special case where relocation offset = 0. - Compile out exception handling code and install a simpler vector Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
parent
1e463866f5
commit
033ca72438
2 changed files with 39 additions and 12 deletions
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@ -42,7 +42,16 @@ _start: b reset
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ldr pc, _not_used
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ldr pc, _not_used
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ldr pc, _irq
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ldr pc, _irq
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ldr pc, _fiq
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ldr pc, _fiq
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#ifdef CONFIG_SPL_BUILD
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_undefined_instruction: .word _undefined_instruction
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_software_interrupt: .word _software_interrupt
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_prefetch_abort: .word _prefetch_abort
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_data_abort: .word _data_abort
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_not_used: .word _not_used
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_irq: .word _irq
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_fiq: .word _fiq
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_pad: .word 0x12345678 /* now 16*4=64 */
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#else
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_undefined_instruction: .word undefined_instruction
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_undefined_instruction: .word undefined_instruction
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_software_interrupt: .word software_interrupt
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_software_interrupt: .word software_interrupt
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_prefetch_abort: .word prefetch_abort
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_prefetch_abort: .word prefetch_abort
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@ -51,6 +60,8 @@ _not_used: .word not_used
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_irq: .word irq
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_irq: .word irq
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_fiq: .word fiq
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_fiq: .word fiq
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_pad: .word 0x12345678 /* now 16*4=64 */
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_pad: .word 0x12345678 /* now 16*4=64 */
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#endif /* CONFIG_SPL_BUILD */
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.global _end_vect
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.global _end_vect
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_end_vect:
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_end_vect:
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@ -89,6 +100,10 @@ _armboot_start:
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_bss_start_ofs:
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_bss_start_ofs:
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.word __bss_start - _start
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.word __bss_start - _start
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.global _image_copy_end_ofs
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_image_copy_end_ofs:
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.word __image_copy_end - _start
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.globl _bss_end_ofs
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.globl _bss_end_ofs
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_bss_end_ofs:
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_bss_end_ofs:
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.word __bss_end__ - _start
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.word __bss_end__ - _start
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@ -182,12 +197,11 @@ stack_setup:
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mov sp, r4
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mov sp, r4
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adr r0, _start
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adr r0, _start
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#ifndef CONFIG_SPL_BUILD
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cmp r0, r6
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cmp r0, r6
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moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
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beq clear_bss /* skip relocation */
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beq clear_bss /* skip relocation */
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#endif
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mov r1, r6 /* r1 <- scratch for copy_loop */
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mov r1, r6 /* r1 <- scratch for copy_loop */
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ldr r3, _bss_start_ofs
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ldr r3, _image_copy_end_ofs
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add r2, r0, r3 /* r2 <- source end address */
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add r2, r0, r3 /* r2 <- source end address */
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copy_loop:
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copy_loop:
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@ -235,20 +249,34 @@ fixnext:
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add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
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add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
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cmp r2, r3
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cmp r2, r3
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blo fixloop
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blo fixloop
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b clear_bss
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_rel_dyn_start_ofs:
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.word __rel_dyn_start - _start
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_rel_dyn_end_ofs:
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.word __rel_dyn_end - _start
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_dynsym_start_ofs:
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.word __dynsym_start - _start
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#endif /* #ifndef CONFIG_SPL_BUILD */
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clear_bss:
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clear_bss:
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#ifdef CONFIG_SPL_BUILD
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/* No relocation for SPL */
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ldr r0, =__bss_start
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ldr r1, =__bss_end__
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#else
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ldr r0, _bss_start_ofs
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ldr r0, _bss_start_ofs
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ldr r1, _bss_end_ofs
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ldr r1, _bss_end_ofs
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mov r4, r6 /* reloc addr */
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mov r4, r6 /* reloc addr */
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add r0, r0, r4
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add r0, r0, r4
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add r1, r1, r4
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add r1, r1, r4
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#endif
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mov r2, #0x00000000 /* clear */
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mov r2, #0x00000000 /* clear */
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clbss_l:str r2, [r0] /* clear loop... */
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clbss_l:str r2, [r0] /* clear loop... */
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add r0, r0, #4
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add r0, r0, #4
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cmp r0, r1
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cmp r0, r1
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bne clbss_l
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bne clbss_l
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#endif /* #ifndef CONFIG_SPL_BUILD */
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/*
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/*
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* We are done. Do not return, instead branch to second part of board
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* We are done. Do not return, instead branch to second part of board
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@ -276,12 +304,6 @@ jump_2_ram:
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_board_init_r_ofs:
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_board_init_r_ofs:
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.word board_init_r - _start
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.word board_init_r - _start
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_rel_dyn_start_ofs:
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.word __rel_dyn_start - _start
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_rel_dyn_end_ofs:
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.word __rel_dyn_end - _start
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_dynsym_start_ofs:
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.word __dynsym_start - _start
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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/*************************************************************************
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/*************************************************************************
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@ -329,6 +351,8 @@ cpu_init_crit:
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mov lr, ip @ restore link
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mov lr, ip @ restore link
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mov pc, lr @ back to my caller
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mov pc, lr @ back to my caller
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#endif
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#endif
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#ifndef CONFIG_SPL_BUILD
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/*
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/*
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*************************************************************************
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*************************************************************************
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*
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*
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@ -516,4 +540,5 @@ fiq:
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bad_save_user_regs
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bad_save_user_regs
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bl do_fiq
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bl do_fiq
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#endif
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#endif /* CONFIG_USE_IRQ */
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#endif /* CONFIG_SPL_BUILD */
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@ -55,6 +55,8 @@ SECTIONS
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. = ALIGN(4);
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. = ALIGN(4);
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__image_copy_end = .;
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.rel.dyn : {
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.rel.dyn : {
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__rel_dyn_start = .;
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__rel_dyn_start = .;
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*(.rel*)
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*(.rel*)
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