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rm9200 lowevel_init: don't touch reserved/readonly registers

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For some reason the AT91rm9200 lowlevel init writes to a bunch of
reserved or read-only addresses.  All the boards seem to define the
value-to-be-written values as zero ... but they shouldn't actually
be writing *anything* there.

No documented erratum justifies these accesses.  It looks like maybe
some pre-release BDI-2000 setup code has been carried along by cargo
cult programming since at least late 2004 (per GIT history).

Here's a patch disabling what seems to be bogosity.  Tested on a
csb337; there were no behavioral changes.

Signed-off-by: David Brownell <david-b@pacbell.net>

on RM9200ek
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This commit is contained in:
David Brownell 2009-07-16 18:40:55 -07:00 • committed by Jean-Christophe PLAGNIOL-VILLARD
parent 301b7db88f
commit 06bffc6ea5
7 changed files with 2 additions and 42 deletions
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14
cpu/arm920t/at91rm9200/lowlevel_init.S
View file

@ -81,6 +81,7 @@ LoopOsc:
bne 0b bne 0b
/* delay - this is all done by guess */ /* delay - this is all done by guess */
ldr r0, =0x00010000 ldr r0, =0x00010000
/* (vs reading PMC_SR for LOCKA, LOCKB ... or MOSCS earlier) */
1: 1:
subs r0, r0, #1 subs r0, r0, #1
bhi 1b bhi 1b
@ -108,16 +109,6 @@ LoopOsc:
.ltorg .ltorg
SMRDATA: SMRDATA:
.word AT91C_MC_PUIA
.word CONFIG_SYS_MC_PUIA_VAL
.word AT91C_MC_PUP
.word CONFIG_SYS_MC_PUP_VAL
.word AT91C_MC_PUER
.word CONFIG_SYS_MC_PUER_VAL
.word AT91C_MC_ASR
.word CONFIG_SYS_MC_ASR_VAL
.word AT91C_MC_AASR
.word CONFIG_SYS_MC_AASR_VAL
.word AT91C_EBI_CFGR .word AT91C_EBI_CFGR
.word CONFIG_SYS_EBI_CFGR_VAL .word CONFIG_SYS_EBI_CFGR_VAL
.word AT91C_SMC_CSR0 .word AT91C_SMC_CSR0
@ -128,8 +119,7 @@ SMRDATA:
.word CONFIG_SYS_PLLBR_VAL .word CONFIG_SYS_PLLBR_VAL
.word AT91C_MCKR .word AT91C_MCKR
.word CONFIG_SYS_MCKR_VAL .word CONFIG_SYS_MCKR_VAL
/* SMRDATA is 80 bytes long */ /* here there's a delay */
/* here there's a delay of 100 */
SMRDATA1: SMRDATA1:
.word AT91C_PIOC_ASR .word AT91C_PIOC_ASR
.word CONFIG_SYS_PIOC_ASR_VAL .word CONFIG_SYS_PIOC_ASR_VAL

5
include/configs/at91rm9200dk.h
View file

@ -45,11 +45,6 @@
#ifndef CONFIG_SKIP_LOWLEVEL_INIT #ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
/* flash */ /* flash */
#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
#define CONFIG_SYS_MC_PUP_VAL 0x00000000
#define CONFIG_SYS_MC_PUER_VAL 0x00000000
#define CONFIG_SYS_MC_ASR_VAL 0x00000000
#define CONFIG_SYS_MC_AASR_VAL 0x00000000
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */

5
include/configs/at91rm9200ek.h
View file

@ -56,11 +56,6 @@
#ifndef CONFIG_SKIP_LOWLEVEL_INIT #ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
/* flash */ /* flash */
#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
#define CONFIG_SYS_MC_PUP_VAL 0x00000000
#define CONFIG_SYS_MC_PUER_VAL 0x00000000
#define CONFIG_SYS_MC_ASR_VAL 0x00000000
#define CONFIG_SYS_MC_AASR_VAL 0x00000000
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */

5
include/configs/cmc_pu2.h
View file

@ -44,11 +44,6 @@
#ifndef CONFIG_SKIP_LOWLEVEL_INIT #ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
/* flash */ /* flash */
#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
#define CONFIG_SYS_MC_PUP_VAL 0x00000000
#define CONFIG_SYS_MC_PUER_VAL 0x00000000
#define CONFIG_SYS_MC_ASR_VAL 0x00000000
#define CONFIG_SYS_MC_AASR_VAL 0x00000000
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */ #define CONFIG_SYS_SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */

5
include/configs/csb637.h
View file

@ -45,11 +45,6 @@
#ifndef CONFIG_SKIP_LOWLEVEL_INIT #ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
/* flash */ /* flash */
#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
#define CONFIG_SYS_MC_PUP_VAL 0x00000000
#define CONFIG_SYS_MC_PUER_VAL 0x00000000
#define CONFIG_SYS_MC_ASR_VAL 0x00000000
#define CONFIG_SYS_MC_AASR_VAL 0x00000000
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */

5
include/configs/m501sk.h
View file

@ -46,11 +46,6 @@
*/ */
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
/* flash */ /* flash */
#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
#define CONFIG_SYS_MC_PUP_VAL 0x00000000
#define CONFIG_SYS_MC_PUER_VAL 0x00000000
#define CONFIG_SYS_MC_ASR_VAL 0x00000000
#define CONFIG_SYS_MC_AASR_VAL 0x00000000
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */

5
include/configs/mp2usb.h
View file

@ -49,11 +49,6 @@
#ifndef CONFIG_SKIP_LOWLEVEL_INIT #ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
/* flash */ /* flash */
#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
#define CONFIG_SYS_MC_PUP_VAL 0x00000000
#define CONFIG_SYS_MC_PUER_VAL 0x00000000
#define CONFIG_SYS_MC_ASR_VAL 0x00000000
#define CONFIG_SYS_MC_AASR_VAL 0x00000000
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */ #define CONFIG_SYS_SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */