Merge branch '2021-09-07-ATAGs-and-related-migration' into next

- Merge ATAGs and MACH_ID options to Kconfig, and then disable them for
  nearly all platforms.  A small number of platforms actively require
  this support still, and have it still enabled.  Otherwise, it's migrated
  and disabled.
This commit is contained in:
Tom Rini 2021-09-07 22:29:57 -04:00
commit 07298e4828
246 changed files with 197 additions and 874 deletions

10
README
View file

@ -586,16 +586,6 @@ The following options need to be configured:
crash. This is needed for buggy hardware (uc101) where crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7. no pull down resistor is connected to the signal IDE5V_DD7.
CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
This setting is mandatory for all boards that have only one
machine type and must be used to specify the machine type
number as it appears in the ARM machine registry
(see https://www.arm.linux.org.uk/developer/machines/).
Only boards that have multiple machine types supported
in a single configuration file and the machine type is
runtime discoverable, do not have to use this setting.
- vxWorks boot parameters: - vxWorks boot parameters:
bootvx constructs a valid bootline using the following bootvx constructs a valid bootline using the following

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@ -1907,6 +1907,50 @@ config TARGET_XENGUEST_ARM64
select SSCANF select SSCANF
endchoice endchoice
config SUPPORT_PASSING_ATAGS
bool "Support pre-devicetree ATAG-based booting"
depends on !ARM64
imply SETUP_MEMORY_TAGS
help
Support for booting older Linux kernels, using ATAGs rather than
passing a devicetree. This is option is rarely used, and the
semantics are defined at
https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
config SETUP_MEMORY_TAGS
bool "Pass memory size information via ATAG"
depends on SUPPORT_PASSING_ATAGS
config CMDLINE_TAG
bool "Pass Linux kernel cmdline via ATAG"
depends on SUPPORT_PASSING_ATAGS
config INITRD_TAG
bool "Pass initrd starting point and size via ATAG"
depends on SUPPORT_PASSING_ATAGS
config REVISION_TAG
bool "Pass system revision via ATAG"
depends on SUPPORT_PASSING_ATAGS
config SERIAL_TAG
bool "Pass system serial number via ATAG"
depends on SUPPORT_PASSING_ATAGS
config STATIC_MACH_TYPE
bool "Statically define the Machine ID number"
help
When booting via ATAGs, enable this option if we know the correct
machine ID number to use at compile time. Some systems will be
passed the number dynamically by whatever loads U-Boot.
config MACH_TYPE
int "Machine ID number"
depends on STATIC_MACH_TYPE
help
When booting via ATAGs, the machine type must be passed as a number.
For the full list see https://www.arm.linux.org.uk/developer/machines
config ARCH_SUPPORT_TFABOOT config ARCH_SUPPORT_TFABOOT
bool bool

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@ -41,9 +41,12 @@ extern void udc_disconnect(void);
struct tag_serialnr; struct tag_serialnr;
#ifdef CONFIG_SERIAL_TAG #ifdef CONFIG_SERIAL_TAG
#define BOOTM_ENABLE_SERIAL_TAG 1 #define BOOTM_ENABLE_SERIAL_TAG 1
void get_board_serial(struct tag_serialnr *serialnr);
#else #else
#define BOOTM_ENABLE_SERIAL_TAG 0 #define BOOTM_ENABLE_SERIAL_TAG 0
#endif
#if defined(CONFIG_SERIAL_TAG) || defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
void get_board_serial(struct tag_serialnr *serialnr);
#else
static inline void get_board_serial(struct tag_serialnr *serialnr) static inline void get_board_serial(struct tag_serialnr *serialnr)
{ {
} }

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@ -172,7 +172,7 @@ enum boot_device get_boot_device(void)
return boot_dev; return boot_dev;
} }
#ifdef CONFIG_SERIAL_TAG #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define FUSE_UNIQUE_ID_WORD0 16 #define FUSE_UNIQUE_ID_WORD0 16
#define FUSE_UNIQUE_ID_WORD1 17 #define FUSE_UNIQUE_ID_WORD1 17
void get_board_serial(struct tag_serialnr *serialnr) void get_board_serial(struct tag_serialnr *serialnr)
@ -201,7 +201,7 @@ void get_board_serial(struct tag_serialnr *serialnr)
serialnr->low = val1; serialnr->low = val1;
serialnr->high = val2; serialnr->high = val2;
} }
#endif /*CONFIG_SERIAL_TAG*/ #endif /*CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG*/
#ifdef CONFIG_ENV_IS_IN_MMC #ifdef CONFIG_ENV_IS_IN_MMC
__weak int board_mmc_get_env_dev(int devno) __weak int board_mmc_get_env_dev(int devno)

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@ -405,7 +405,7 @@ int dram_init(void)
return 0; return 0;
} }
#ifdef CONFIG_SERIAL_TAG #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
void get_board_serial(struct tag_serialnr *serialnr) void get_board_serial(struct tag_serialnr *serialnr)
{ {
u32 uid[4]; u32 uid[4];

View file

@ -15,6 +15,7 @@
#include <asm/arch/imx-rdc.h> #include <asm/arch/imx-rdc.h>
#include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/boot_mode.h>
#include <asm/arch/crm_regs.h> #include <asm/arch/crm_regs.h>
#include <asm/bootm.h>
#include <dm.h> #include <dm.h>
#include <env.h> #include <env.h>
#include <imx_thermal.h> #include <imx_thermal.h>
@ -337,10 +338,19 @@ int arch_cpu_init(void)
int arch_misc_init(void) int arch_misc_init(void)
{ {
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
struct tag_serialnr serialnr;
char serial_string[0x20];
if (is_mx7d()) if (is_mx7d())
env_set("soc", "imx7d"); env_set("soc", "imx7d");
else else
env_set("soc", "imx7s"); env_set("soc", "imx7s");
/* Set serial# standard environment variable based on OTP settings */
get_board_serial(&serialnr);
snprintf(serial_string, sizeof(serial_string), "0x%08x%08x",
serialnr.low, serialnr.high);
env_set("serial#", serial_string);
#endif #endif
#ifdef CONFIG_FSL_CAAM #ifdef CONFIG_FSL_CAAM
@ -351,7 +361,7 @@ int arch_misc_init(void)
} }
#endif #endif
#ifdef CONFIG_SERIAL_TAG #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* /*
* OCOTP_TESTER * OCOTP_TESTER
* i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1, 08/2016 * i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1, 08/2016

View file

@ -196,12 +196,14 @@ int board_init(void)
return 0; return 0;
} }
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
int rev = 0; int rev = 0;
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
} }
#endif
/* /*
* called prior to booting kernel or by 'fdt boardsetup' command * called prior to booting kernel or by 'fdt boardsetup' command

View file

@ -73,8 +73,10 @@ int board_early_init_f(void)
int board_init(void) int board_init(void)
{ {
#ifdef CONFIG_MACH_TYPE
/* Machine number */ /* Machine number */
gd->bd->bi_arch_number = CONFIG_MACH_TYPE; gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
#endif
/* Boot parameters address */ /* Boot parameters address */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;

View file

@ -2,4 +2,4 @@
# #
# Copyright (C) 2021 Phil Sutter <phil@nwl.cc> # Copyright (C) 2021 Phil Sutter <phil@nwl.cc>
obj-y += legacy.o obj-$(SUPPORT_PASSING_ATAGS) += legacy.o

View file

@ -15,14 +15,15 @@
static unsigned int syno_board_id(void) static unsigned int syno_board_id(void)
{ {
#ifdef CONFIG_MACH_TYPE
switch (CONFIG_MACH_TYPE) { switch (CONFIG_MACH_TYPE) {
case 527: case 527:
return SYNO_DS109_ID; return SYNO_DS109_ID;
case 3036: case 3036:
return SYNO_AXP_4BAY_2BAY; return SYNO_AXP_4BAY_2BAY;
default:
return 0;
} }
#endif
return 0;
} }
static unsigned int usb_port_modes(void) static unsigned int usb_port_modes(void)

View file

@ -48,6 +48,7 @@ static const u32 CCAT_MODE_RUN = 0x0033DC8F;
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@ -59,6 +60,7 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
} }
#endif
/* /*
* Set CCAT mode * Set CCAT mode

View file

@ -38,11 +38,6 @@ int board_init(void)
return 0; return 0;
} }
u32 get_board_rev(void)
{
return 0;
}
void reset_cpu(void) void reset_cpu(void)
{ {
} }

View file

@ -720,10 +720,12 @@ int dram_init(void)
return 0; return 0;
} }
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS); return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS);
} }
#endif
static struct mxc_serial_plat cm_fx6_mxc_serial_plat = { static struct mxc_serial_plat cm_fx6_mxc_serial_plat = {
.reg = (struct mxc_uart *)UART4_BASE, .reg = (struct mxc_uart *)UART4_BASE,

View file

@ -232,6 +232,7 @@ const int lpsc_size = ARRAY_SIZE(lpsc);
#define REV_AM18X_EVM 0x100 #define REV_AM18X_EVM 0x100
#ifdef CONFIG_REVISION_TAG
/* /*
* get_board_rev() - setup to pass kernel board revision information * get_board_rev() - setup to pass kernel board revision information
* Returns: * Returns:
@ -259,6 +260,7 @@ u32 get_board_rev(void)
rev = 1; rev = 1;
return rev; return rev;
} }
#endif
int board_early_init_f(void) int board_early_init_f(void)
{ {

View file

@ -143,20 +143,6 @@ const int lpsc_size = ARRAY_SIZE(lpsc);
#define CONFIG_DA850_EVM_MAX_CPU_CLK 456000000 #define CONFIG_DA850_EVM_MAX_CPU_CLK 456000000
#endif #endif
/*
* get_board_rev() - setup to pass kernel board revision information
* Returns:
* bit[0-3] Maximum cpu clock rate supported by onboard SoC
* 0000b - 300 MHz
* 0001b - 372 MHz
* 0010b - 408 MHz
* 0011b - 456 MHz
*/
u32 get_board_rev(void)
{
return 0;
}
int board_early_init_f(void) int board_early_init_f(void)
{ {
/* /*

View file

@ -71,11 +71,6 @@ u32 spl_boot_device(void)
} }
#endif #endif
u32 get_board_rev(void)
{
return 0;
}
int board_init(void) int board_init(void)
{ {
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -71,11 +71,6 @@ u32 spl_boot_device(void)
} }
#endif #endif
u32 get_board_rev(void)
{
return 0;
}
int board_init(void) int board_init(void)
{ {
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -35,6 +35,7 @@ int dram_init(void)
return 0; return 0;
} }
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
u32 rev = get_cpu_rev(); u32 rev = get_cpu_rev();
@ -42,6 +43,7 @@ u32 get_board_rev(void)
rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET; rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
return rev; return rev;
} }
#endif
#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH) #define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH)

View file

@ -32,6 +32,7 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@ -46,6 +47,7 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
} }
#endif
#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ #define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)

View file

@ -321,12 +321,14 @@ static void setup_gpmi_nand(void)
} }
#endif #endif
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
int rev = nxp_board_rev(); int rev = nxp_board_rev();
return (get_cpu_rev() & ~(0xF << 8)) | rev; return (get_cpu_rev() & ~(0xF << 8)) | rev;
} }
#endif
static int ar8031_phy_fixup(struct phy_device *phydev) static int ar8031_phy_fixup(struct phy_device *phydev)
{ {

View file

@ -295,12 +295,12 @@ static void set_ether_addr(void)
env_set("ethaddr", ethaddr); env_set("ethaddr", ethaddr);
} }
#ifdef CONFIG_REVISION_TAG #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
static void set_board_rev(void) static void set_board_rev(void)
{ {
char info[64] = {0, }; char info[64] = {0, };
snprintf(info, ARRAY_SIZE(info), "%02x", get_board_rev()); snprintf(info, ARRAY_SIZE(info), "%02x", get_board_revision());
env_set("board_rev", info); env_set("board_rev", info);
} }
#endif #endif
@ -310,7 +310,7 @@ static void set_dtb_name(void)
char info[64] = {0, }; char info[64] = {0, };
snprintf(info, ARRAY_SIZE(info), snprintf(info, ARRAY_SIZE(info),
"s5p4418-nanopi2-rev%02x.dtb", get_board_rev()); "s5p4418-nanopi2-rev%02x.dtb", get_board_revision());
env_set("dtb_name", info); env_set("dtb_name", info);
} }
@ -436,7 +436,7 @@ int board_late_init(void)
{ {
bd_update_env(); bd_update_env();
#ifdef CONFIG_REVISION_TAG #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
set_board_rev(); set_board_rev();
#endif #endif
set_dtb_name(); set_dtb_name();

View file

@ -80,11 +80,18 @@ void bd_base_rev_init(void)
} }
/* To override __weak symbols */ /* To override __weak symbols */
u32 get_board_rev(void) u32 get_board_revision(void)
{ {
return (base_rev << 8) | pcb_rev; return (base_rev << 8) | pcb_rev;
} }
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return get_board_revision();
}
#endif
const char *get_board_name(void) const char *get_board_name(void)
{ {
bd_hwrev_init(); bd_hwrev_init();

View file

@ -9,7 +9,7 @@
extern void bd_hwrev_init(void); extern void bd_hwrev_init(void);
extern void bd_base_rev_init(void); extern void bd_base_rev_init(void);
extern u32 get_board_rev(void); extern u32 get_board_revision(void);
extern const char *get_board_name(void); extern const char *get_board_name(void);
#endif /* __BD_HW_REV_H__ */ #endif /* __BD_HW_REV_H__ */

View file

@ -81,10 +81,12 @@ int dram_init_banksize(void)
return 0; return 0;
} }
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
return get_cpu_rev() & ~(0xF << 8); return get_cpu_rev() & ~(0xF << 8);
} }
#endif
#ifdef CONFIG_USB_EHCI_MX5 #ifdef CONFIG_USB_EHCI_MX5
int board_ehci_hcd_init(int port) int board_ehci_hcd_init(int port)

View file

@ -27,6 +27,7 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@ -38,6 +39,7 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
} }
#endif
struct fsl_esdhc_cfg esdhc_cfg[1] = { struct fsl_esdhc_cfg esdhc_cfg[1] = {
{MMC_SDHC1_BASE_ADDR} {MMC_SDHC1_BASE_ADDR}

View file

@ -156,11 +156,13 @@ int misc_init_r(void)
return 0; return 0;
} }
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
/* Sold devices are expected to be at least revision F. */ /* Sold devices are expected to be at least revision F. */
return 6; return 6;
} }
#endif
void get_board_serial(struct tag_serialnr *serialnr) void get_board_serial(struct tag_serialnr *serialnr)
{ {

View file

@ -241,6 +241,7 @@ int board_init(void)
return 0; return 0;
} }
#ifdef CONFIG_REVISION_TAG
/* /*
* Routine: get_board_revision * Routine: get_board_revision
* Description: Return board revision. * Description: Return board revision.
@ -249,6 +250,7 @@ u32 get_board_rev(void)
{ {
return simple_strtol(hw_build_ptr, NULL, 16); return simple_strtol(hw_build_ptr, NULL, 16);
} }
#endif
/* /*
* Routine: setup_board_tags * Routine: setup_board_tags

View file

@ -16,7 +16,7 @@
#include <asm/gpio.h> #include <asm/gpio.h>
/* TODO: Remove this code when the SPI switch is working */ /* TODO: Remove this code when the SPI switch is working */
#if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) #ifndef CONFIG_TARGET_VENTANA
void gpio_early_init_uart(void) void gpio_early_init_uart(void)
{ {
/* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */

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@ -419,7 +419,7 @@ int misc_init_r(void)
return 0; return 0;
} }
static void get_board_rev(void) static void get_board_revision(void)
{ {
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_board_rev, msg, 1); ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_board_rev, msg, 1);
int ret; int ret;
@ -478,7 +478,7 @@ int board_init(void)
hw_watchdog_init(); hw_watchdog_init();
#endif #endif
get_board_rev(); get_board_revision();
gd->bd->bi_boot_params = 0x100; gd->bd->bi_boot_params = 0x100;

View file

@ -47,18 +47,6 @@ struct odroid_rev_info odroid_info[] = {
{ EXYNOS5_BOARD_ODROID_UNKNOWN, 0, 4095, "unknown" }, { EXYNOS5_BOARD_ODROID_UNKNOWN, 0, 4095, "unknown" },
}; };
static unsigned int odroid_get_rev(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(odroid_info); i++) {
if (odroid_info[i].board_type == gd->board_type)
return odroid_info[i].board_rev;
}
return 0;
}
/* /*
* Read ADC at least twice and check the resuls. If regulator providing voltage * Read ADC at least twice and check the resuls. If regulator providing voltage
* on to measured point was just turned on, first reads might require time * on to measured point was just turned on, first reads might require time
@ -200,6 +188,19 @@ bool board_is_generic(void)
return false; return false;
} }
#ifdef CONFIG_REVISION_TAG
static unsigned int odroid_get_rev(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(odroid_info); i++) {
if (odroid_info[i].board_type == gd->board_type)
return odroid_info[i].board_rev;
}
return 0;
}
/** /**
* get_board_rev() - return detected board revision. * get_board_rev() - return detected board revision.
* *
@ -212,6 +213,7 @@ u32 get_board_rev(void)
return odroid_get_rev(); return odroid_get_rev();
} }
#endif
/** /**
* get_board_type() - returns board type string. * get_board_type() - returns board type string.

View file

@ -24,11 +24,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
u32 get_board_rev(void)
{
return 0;
}
int board_init(void) int board_init(void)
{ {
/* Set Initial global variables */ /* Set Initial global variables */

View file

@ -12,11 +12,6 @@
#include <asm/arch/pinmux.h> #include <asm/arch/pinmux.h>
#include <usb.h> #include <usb.h>
u32 get_board_rev(void)
{
return 0;
}
int exynos_init(void) int exynos_init(void)
{ {
return 0; return 0;

View file

@ -67,10 +67,12 @@ static void check_hw_revision(void)
board_rev = modelrev << 8; board_rev = modelrev << 8;
} }
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
return board_rev; return board_rev;
} }
#endif
static inline u32 get_model_rev(void) static inline u32 get_model_rev(void)
{ {

View file

@ -33,10 +33,12 @@ DECLARE_GLOBAL_DATA_PTR;
unsigned int board_rev; unsigned int board_rev;
static int init_pmic_lcd(void); static int init_pmic_lcd(void);
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void) u32 get_board_rev(void)
{ {
return board_rev; return board_rev;
} }
#endif
int exynos_power_init(void) int exynos_power_init(void)
{ {

View file

@ -46,11 +46,6 @@ int dram_init_banksize(void)
return 0; return 0;
} }
u32 get_board_rev(void)
{
return 0;
}
int board_init(void) int board_init(void)
{ {
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -40,11 +40,6 @@ int dram_init_banksize(void)
return 0; return 0;
} }
u32 get_board_rev(void)
{
return 0;
}
int board_init(void) int board_init(void)
{ {
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -40,11 +40,6 @@ int dram_init_banksize(void)
return 0; return 0;
} }
u32 get_board_rev(void)
{
return 0;
}
int board_init(void) int board_init(void)
{ {
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -77,12 +77,7 @@ u32 spl_boot_device(void)
{ {
return BOOT_DEVICE_XIP; return BOOT_DEVICE_XIP;
} }
#endif #endif
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void) int board_late_init(void)
{ {

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@ -36,11 +36,6 @@ int dram_init_banksize(void)
return 0; return 0;
} }
u32 get_board_rev(void)
{
return 0;
}
int board_init(void) int board_init(void)
{ {
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

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@ -36,11 +36,6 @@ int dram_init_banksize(void)
return 0; return 0;
} }
u32 get_board_rev(void)
{
return 0;
}
int board_init(void) int board_init(void)
{ {
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

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@ -41,11 +41,6 @@ int board_early_init_f(void)
return 0; return 0;
} }
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void) int board_late_init(void)
{ {
return 0; return 0;

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@ -312,6 +312,7 @@ void board_mmc_power_init(void)
#endif #endif
#endif #endif
#ifdef CONFIG_REVISION_TAG
/* /*
* get_board_rev() - get board revision * get_board_rev() - get board revision
*/ */
@ -319,3 +320,4 @@ u32 get_board_rev(void)
{ {
return 0x20; return 0x20;
} }
#endif

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@ -104,6 +104,7 @@ int spl_start_uboot(void)
} }
#endif /* CONFIG_SPL_OS_BOOT */ #endif /* CONFIG_SPL_OS_BOOT */
#ifdef CONFIG_REVISION_TAG
/* /*
* get_board_rev() - get board revision * get_board_rev() - get board revision
*/ */
@ -111,3 +112,4 @@ u32 get_board_rev(void)
{ {
return 0x20; return 0x20;
} }
#endif

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@ -707,12 +707,11 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT #ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void) int board_late_init(void)
{ {
#if defined(CONFIG_REVISION_TAG) && \ #if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
char env_str[256]; char env_str[256];
u32 rev; u32 rev;
rev = get_board_rev(); rev = get_board_revision();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev); snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
env_set("board_rev", env_str); env_set("board_rev", env_str);

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@ -611,12 +611,11 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT #ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void) int board_late_init(void)
{ {
#if defined(CONFIG_REVISION_TAG) && \ #if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
char env_str[256]; char env_str[256];
u32 rev; u32 rev;
rev = get_board_rev(); rev = get_board_revision();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev); snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
env_set("board_rev", env_str); env_set("board_rev", env_str);
#endif #endif

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@ -493,24 +493,24 @@ static int get_cfgblock_interactive(void)
else else
tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ; tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ;
} }
#ifdef CONFIG_MACH_TYPE #if defined(CONFIG_TARGET_APALIS_T30) || defined(CONFIG_TARGET_COLIBRI_T30)
else if (!strcmp("tegra30", soc)) { else if (!strcmp("tegra30", soc)) {
if (CONFIG_MACH_TYPE == MACH_TYPE_APALIS_T30) { #ifdef CONFIG_TARGET_APALIS_T30
if (it == 'y' || it == 'Y') if (it == 'y' || it == 'Y')
tdx_hw_tag.prodid = APALIS_T30_IT; tdx_hw_tag.prodid = APALIS_T30_IT;
else
if (gd->ram_size == 0x40000000)
tdx_hw_tag.prodid = APALIS_T30_1GB;
else else
if (gd->ram_size == 0x40000000) tdx_hw_tag.prodid = APALIS_T30_2GB;
tdx_hw_tag.prodid = APALIS_T30_1GB; #else
else if (it == 'y' || it == 'Y')
tdx_hw_tag.prodid = APALIS_T30_2GB; tdx_hw_tag.prodid = COLIBRI_T30_IT;
} else { else
if (it == 'y' || it == 'Y') tdx_hw_tag.prodid = COLIBRI_T30;
tdx_hw_tag.prodid = COLIBRI_T30_IT; #endif
else
tdx_hw_tag.prodid = COLIBRI_T30;
}
} }
#endif /* CONFIG_MACH_TYPE */ #endif /* CONFIG_TARGET_APALIS_T30 || CONFIG_TARGET_COLIBRI_T30 */
else if (!strcmp("tegra124", soc)) { else if (!strcmp("tegra124", soc)) {
tdx_hw_tag.prodid = APALIS_TK1_2GB; tdx_hw_tag.prodid = APALIS_TK1_2GB;
} else if (!strcmp("vf500", soc)) { } else if (!strcmp("vf500", soc)) {

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@ -32,8 +32,8 @@ static char tdx_car_rev_str[6];
static char *tdx_carrier_board_name; static char *tdx_carrier_board_name;
#endif #endif
#ifdef CONFIG_REVISION_TAG #if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
u32 get_board_rev(void) u32 get_board_revision(void)
{ {
/* Check validity */ /* Check validity */
if (!tdx_hw_tag.ver_major) if (!tdx_hw_tag.ver_major)
@ -183,8 +183,8 @@ int ft_common_board_setup(void *blob, struct bd_info *bd)
#else /* CONFIG_TDX_CFG_BLOCK */ #else /* CONFIG_TDX_CFG_BLOCK */
#ifdef CONFIG_REVISION_TAG #if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
u32 get_board_rev(void) u32 get_board_revision(void)
{ {
return 0; return 0;
} }

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@ -10,6 +10,7 @@
#define TDX_USB_VID 0x1B67 #define TDX_USB_VID 0x1B67
int ft_common_board_setup(void *blob, struct bd_info *bd); int ft_common_board_setup(void *blob, struct bd_info *bd);
u32 get_board_revision(void);
#if defined(CONFIG_DM_VIDEO) #if defined(CONFIG_DM_VIDEO)
int show_boot_logo(void); int show_boot_logo(void);

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@ -134,7 +134,7 @@ int checkboard(void)
int board_late_init(void) int board_late_init(void)
{ {
struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
#ifdef CONFIG_SERIAL_TAG #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
struct tag_serialnr serialnr; struct tag_serialnr serialnr;
char serial_string[0x20]; char serial_string[0x20];
#endif #endif
@ -156,7 +156,7 @@ int board_late_init(void)
env_set_ulong(HAB_ENABLED_ENVNAME, 0); env_set_ulong(HAB_ENABLED_ENVNAME, 0);
#endif #endif
#ifdef CONFIG_SERIAL_TAG #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Set serial# standard environment variable based on OTP settings */ /* Set serial# standard environment variable based on OTP settings */
get_board_serial(&serialnr); get_board_serial(&serialnr);
snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x", snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",

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@ -64,6 +64,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_SPL_ENV_IS_NOWHERE=y CONFIG_SPL_ENV_IS_NOWHERE=y
CONFIG_VERSION_VARIABLE=y CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTP_SEND_HOSTNAME=y

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@ -16,7 +16,6 @@ CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033"
# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_EXT4=y

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@ -35,6 +35,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1 CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y CONFIG_VERSION_VARIABLE=y
CONFIG_IP_DEFRAG=y CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_TFTP_BLOCKSIZE=4096

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@ -37,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1 CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y CONFIG_IP_DEFRAG=y

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@ -28,7 +28,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART=y
CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run flash_self" CONFIG_BOOTCOMMAND="run flash_self"

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@ -46,6 +46,7 @@ CONFIG_CMD_FAT=y
CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_SPL_DM=y CONFIG_SPL_DM=y
CONFIG_SPL_CLK=y CONFIG_SPL_CLK=y
CONFIG_CLK_IMX8=y CONFIG_CLK_IMX8=y

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@ -33,6 +33,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1 CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y CONFIG_VERSION_VARIABLE=y
CONFIG_IP_DEFRAG=y CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_TFTP_BLOCKSIZE=4096

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@ -20,7 +20,7 @@ CONFIG_SPL_SERIAL=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_ENV_OFFSET_REDUND=0x180000
CONFIG_SYS_LOAD_ADDR=0x70000000 CONFIG_SYS_LOAD_ADDR=0x70000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"

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@ -3,6 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y CONFIG_ARCH_KIRKWOOD=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_STATIC_MACH_TYPE=y
CONFIG_MACH_TYPE=527
CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2 CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_DS109=y CONFIG_TARGET_DS109=y

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@ -1,6 +1,11 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y CONFIG_ARCH_MVEBU=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_STATIC_MACH_TYPE=y
CONFIG_MACH_TYPE=3036
CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y

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@ -79,6 +79,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1 CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NETCONSOLE=y CONFIG_NETCONSOLE=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y CONFIG_BOUNCE_BUFFER=y

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@ -79,6 +79,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1 CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NETCONSOLE=y CONFIG_NETCONSOLE=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y CONFIG_BOUNCE_BUFFER=y

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@ -81,6 +81,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NETCONSOLE=y CONFIG_NETCONSOLE=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y CONFIG_BOUNCE_BUFFER=y

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@ -1,5 +1,11 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y CONFIG_ARCH_SUNXI=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SERIAL_TAG=y
CONFIG_STATIC_MACH_TYPE=y
CONFIG_MACH_TYPE=4283
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac"
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_MACH_SUN7I=y CONFIG_MACH_SUN7I=y

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@ -50,6 +50,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_SPL_DM=y CONFIG_SPL_DM=y
CONFIG_SPL_CLK=y CONFIG_SPL_CLK=y
CONFIG_CLK_IMX8=y CONFIG_CLK_IMX8=y

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@ -46,6 +46,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_DEV=2
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y CONFIG_SPL_DM=y
CONFIG_SPL_CLK=y CONFIG_SPL_CLK=y

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@ -50,6 +50,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y CONFIG_SPL_DM=y
CONFIG_SPL_CLK=y CONFIG_SPL_CLK=y

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@ -40,6 +40,7 @@ CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y CONFIG_SPL_DM=y
CONFIG_IMX_RGPIO2P=y CONFIG_IMX_RGPIO2P=y

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@ -2,6 +2,12 @@ CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
# CONFIG_SYS_THUMB_BUILD is not set # CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_REVISION_TAG=y
CONFIG_STATIC_MACH_TYPE=y
CONFIG_MACH_TYPE=1955
CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_NR_DRAM_BANKS=2 CONFIG_NR_DRAM_BANKS=2
CONFIG_SYS_MALLOC_LEN=0xc0000 CONFIG_SYS_MALLOC_LEN=0xc0000

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@ -46,6 +46,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ROCKCHIP_GPIO=y CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_SYS_I2C_ROCKCHIP=y

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@ -1,6 +1,9 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_U8500=y CONFIG_ARCH_U8500=y
CONFIG_SUPPORT_PASSING_ATAGS=y
# CONFIG_SETUP_MEMORY_TAGS is not set
CONFIG_INITRD_TAG=y
CONFIG_SYS_TEXT_BASE=0x100000 CONFIG_SYS_TEXT_BASE=0x100000
CONFIG_NR_DRAM_BANKS=2 CONFIG_NR_DRAM_BANKS=2
CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_LEN=0x0200000

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@ -30,7 +30,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART=y
CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"

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@ -32,6 +32,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_BOUNCE_BUFFER=y CONFIG_BOUNCE_BUFFER=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y

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@ -38,6 +38,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_BOUNCE_BUFFER=y CONFIG_BOUNCE_BUFFER=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y

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@ -37,15 +37,6 @@
* for your console driver. * for your console driver.
*/ */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)" #define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
#define MTDPARTS_MTDOOPS "errlog" #define MTDPARTS_MTDOOPS "errlog"
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
@ -60,11 +51,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/
/* size in bytes reserved for initial data */ /* size in bytes reserved for initial data */

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@ -37,15 +37,6 @@
* for your console driver. * for your console driver.
*/ */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)" #define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
#define MTDPARTS_MTDOOPS "errlog" #define MTDPARTS_MTDOOPS "errlog"
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION

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@ -25,8 +25,6 @@
#define CONFIG_SYS_BOOTM_LEN SZ_16M #define CONFIG_SYS_BOOTM_LEN SZ_16M
#define CONFIG_MACH_TYPE MACH_TYPE_AM335XEVM
/* Clock Defines */ /* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */ #define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK) #define V_SCLK (V_OSCK)

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@ -22,8 +22,6 @@
#define V_OSCK 24000000 /* Clock output from T2 */ #define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK) #define V_SCLK (V_OSCK)
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define MEM_LAYOUT_ENV_SETTINGS \ #define MEM_LAYOUT_ENV_SETTINGS \

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@ -16,8 +16,6 @@
#define CONFIG_SYS_BOOTM_LEN (16 << 20) #define CONFIG_SYS_BOOTM_LEN (16 << 20)
/*#define CONFIG_MACH_TYPE 3589 Until the next sync */
/* Clock Defines */ /* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */ #define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK) #define V_SCLK (V_OSCK)

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@ -14,8 +14,6 @@
#include <configs/ti_omap3_common.h> #include <configs/ti_omap3_common.h>
#define CONFIG_REVISION_TAG
/* Hardware drivers */ /* Hardware drivers */
/* /*

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@ -18,8 +18,6 @@
#define USDHC2_BASE_ADDR 0x5b020000 #define USDHC2_BASE_ADDR 0x5b020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Networking */ /* Networking */
#define CONFIG_IPADDR 192.168.10.2 #define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_NETMASK 255.255.255.0

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@ -17,8 +17,6 @@
#define USDHC2_BASE_ADDR 0x5b020000 #define USDHC2_BASE_ADDR 0x5b020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_IPADDR 192.168.10.2 #define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1 #define CONFIG_SERVERIP 192.168.10.1

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@ -14,8 +14,6 @@
#undef CONFIG_DISPLAY_BOARDINFO #undef CONFIG_DISPLAY_BOARDINFO
#define CONFIG_MACH_TYPE 4886
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include <asm/mach-imx/gpio.h> #include <asm/mach-imx/gpio.h>
@ -23,12 +21,6 @@
#include "imx6_spl.h" #include "imx6_spl.h"
#endif #endif
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SERIAL_TAG
#define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */ /* MMC Configs */

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@ -23,8 +23,6 @@
#define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_APALIS_T30
/* PCI networking support */ /* PCI networking support */
#define CONFIG_E1000_NO_NVM #define CONFIG_E1000_NO_NVM

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@ -28,7 +28,6 @@
#include "mx6_common.h" #include "mx6_common.h"
#define CONFIG_MACH_TYPE 4501
#define CONFIG_MMCROOT "/dev/mmcblk0p1" #define CONFIG_MMCROOT "/dev/mmcblk0p1"
/* MMC Configs */ /* MMC Configs */

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@ -13,9 +13,6 @@
#include <asm/arch/platform.h> #include <asm/arch/platform.h>
/* Misc CPU related */ /* Misc CPU related */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SYS_SDRAM_BASE ASPEED_DRAM_BASE #define CONFIG_SYS_SDRAM_BASE ASPEED_DRAM_BASE

View file

@ -35,9 +35,6 @@
#endif #endif
/* Misc CPU related */ /* Misc CPU related */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* general purpose I/O */ /* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
@ -67,24 +64,6 @@
(ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif #endif
/*
* The (arm)linux board id set by generic code depending on configured board
* (see boards.cfg for different boards)
*/
#ifdef CONFIG_AT91SAM9G20
/* the sam9g20 variants have two different board ids */
# ifdef CONFIG_AT91SAM9G20EK_2MMC
/* we may be setup for the 2MMC variant of at91sam9g20ek */
# define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9G20EK_2MMC
# else
/* or the normal at91sam9g20ek */
# define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9G20EK
# endif
#else
/* otherwise default to good old at91sam9260ek */
# define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9260EK
#endif
/* NAND flash */ /* NAND flash */
#ifdef CONFIG_CMD_NAND #ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1

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@ -22,10 +22,6 @@
#include <asm/hardware.h> #include <asm/hardware.h>
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_ATMEL_LEGACY #define CONFIG_ATMEL_LEGACY
/* /*

View file

@ -22,10 +22,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
#ifndef CONFIG_SYS_USE_BOOT_NORFLASH #ifndef CONFIG_SYS_USE_BOOT_NORFLASH
#else #else
#define CONFIG_SYS_USE_NORFLASH #define CONFIG_SYS_USE_NORFLASH

View file

@ -18,10 +18,6 @@
#define CONFIG_AT91SAM9M10G45EK #define CONFIG_AT91SAM9M10G45EK
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* general purpose I/O */ /* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */

View file

@ -14,9 +14,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
/* Misc CPU related */ /* Misc CPU related */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* LCD */ /* LCD */
#define LCD_BPP LCD_COLOR16 #define LCD_BPP LCD_COLOR16

View file

@ -16,10 +16,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
#define CONFIG_ATMEL_LEGACY #define CONFIG_ATMEL_LEGACY
/* /*

View file

@ -12,10 +12,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* general purpose I/O */ /* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */

View file

@ -19,8 +19,6 @@
#include <linux/sizes.h> #include <linux/sizes.h>
#include <configs/ti_am335x_common.h> #include <configs/ti_am335x_common.h>
#define CONFIG_MACH_TYPE MACH_TYPE_AM335XEVM
/* Clock Defines */ /* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */ #define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK) #define V_SCLK (V_OSCK)

View file

@ -119,7 +119,6 @@ extern phys_addr_t prior_stage_fdt_address;
/* /*
* Informational display configuration. * Informational display configuration.
*/ */
#define CONFIG_REVISION_TAG
/* /*
* Command configuration. * Command configuration.

View file

@ -20,8 +20,6 @@
#define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_BEAVER
/* SPI */ /* SPI */
#define CONFIG_TEGRA_SLINK_CTRLS 6 #define CONFIG_TEGRA_SLINK_CTRLS 6
#define CONFIG_SPI_FLASH_SIZE (4 << 20) #define CONFIG_SPI_FLASH_SIZE (4 << 20)

View file

@ -60,9 +60,6 @@
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include <linux/sizes.h> #include <linux/sizes.h>
/* Enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG
/* NAND support */ /* NAND support */
#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1

View file

@ -24,13 +24,6 @@
#define CONFIG_POWER_TPS65217 #define CONFIG_POWER_TPS65217
/* Support both device trees and ATAGs. */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/*#define CONFIG_MACH_TYPE 3589*/
#define CONFIG_MACH_TYPE 0xFFFFFFFF /* TODO: check with kernel*/
/* /*
* When we have NAND flash we expect to be making use of mtdparts, * When we have NAND flash we expect to be making use of mtdparts,
* both for ease of use in U-Boot and for passing information on to * both for ease of use in U-Boot and for passing information on to

View file

@ -24,10 +24,6 @@
#define CONFIG_FSL_USDHC #define CONFIG_FSL_USDHC
/* Boot */ /* Boot */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_MACH_TYPE 0xFFFFFFFF
/* misc */ /* misc */

View file

@ -24,8 +24,6 @@
#define V_OSCK 26000000 /* Clock output from T2 */ #define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK) #define V_SCLK (V_OSCK)
#define CONFIG_MACH_TYPE 3589
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
/* Default environment */ /* Default environment */
@ -60,11 +58,6 @@ BUR_COMMON_ENV \
" bootm ${loadaddr} - ${dtbaddr}\0" " bootm ${loadaddr} - ${dtbaddr}\0"
#endif /* !CONFIG_SPL_BUILD*/ #endif /* !CONFIG_SPL_BUILD*/
/* Support both device trees and ATAGs. */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* SPI Flash */ /* SPI Flash */
/* Environment */ /* Environment */

View file

@ -23,8 +23,6 @@
#define V_OSCK 26000000 /* Clock output from T2 */ #define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK) #define V_SCLK (V_OSCK)
#define CONFIG_MACH_TYPE 3589
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
/* Default environment */ /* Default environment */
@ -57,11 +55,6 @@ BUR_COMMON_ENV \
#define CONFIG_BOOTCOMMAND "mmc dev 1; run b_default" #define CONFIG_BOOTCOMMAND "mmc dev 1; run b_default"
/* Support both device trees and ATAGs. */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* Environment */ /* Environment */
#endif /* __CONFIG_BRXRE1_H__ */ #endif /* __CONFIG_BRXRE1_H__ */

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