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arm: socfpga: Actually enable L2 cache

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The L2 cache was never enabled in the v7_outer_cache_enable(), fix
this and enable the L2 cache.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
This commit is contained in:
Marek Vasut 2015-12-20 04:00:09 +01:00
parent 3721208fa7
commit 0780697787
1 changed files with 11 additions and 2 deletions
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13
arch/arm/mach-socfpga/misc.c
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@ -54,14 +54,23 @@ void enable_caches(void)
void v7_outer_cache_enable(void)
{
/* disable the L2 cache */
writel(0, &pl310->pl310_ctrl);
/* Disable the L2 cache */
clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
/* enable BRESP, instruction and data prefetch, full line of zeroes */
setbits_le32(&pl310->pl310_aux_ctrl,
L310_AUX_CTRL_DATA_PREFETCH_MASK |
L310_AUX_CTRL_INST_PREFETCH_MASK |
L310_SHARED_ATT_OVERRIDE_ENABLE);
/* Enable the L2 cache */
setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
}
void v7_outer_cache_disable(void)
{
/* Disable the L2 cache */
clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
}
/*