mirror of
https://github.com/Fishwaldo/u-boot.git
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Merge git://git.denx.de/u-boot-x86
This commit is contained in:
commit
08546df976
7 changed files with 79 additions and 60 deletions
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@ -96,7 +96,6 @@ config X86
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select DM_SPI
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select DM_SPI
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select DM_SPI_FLASH
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select DM_SPI_FLASH
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select USB_EHCI_HCD
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select USB_EHCI_HCD
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select DM_MMC if MMC
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imply CMD_FPGA_LOADMK
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imply CMD_FPGA_LOADMK
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imply CMD_GETTIME
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imply CMD_GETTIME
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imply CMD_IO
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imply CMD_IO
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@ -11,6 +11,18 @@
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#include <asm/mrccache.h>
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#include <asm/mrccache.h>
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#include <asm/post.h>
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#include <asm/post.h>
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static struct pci_device_id mmc_supported[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 },
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{},
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};
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int cpu_mmc_init(bd_t *bis)
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{
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return pci_mmc_init("ValleyView SDHCI", mmc_supported);
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}
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#ifndef CONFIG_EFI_APP
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#ifndef CONFIG_EFI_APP
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int arch_cpu_init(void)
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int arch_cpu_init(void)
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{
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{
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@ -16,6 +16,11 @@
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#include <asm/arch/msg_port.h>
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#include <asm/arch/msg_port.h>
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#include <asm/arch/quark.h>
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#include <asm/arch/quark.h>
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static struct pci_device_id mmc_supported[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO },
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{},
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};
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static void quark_setup_mtrr(void)
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static void quark_setup_mtrr(void)
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{
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{
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u32 base, mask;
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u32 base, mask;
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@ -323,6 +328,11 @@ int arch_early_init_r(void)
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return 0;
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return 0;
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}
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}
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int cpu_mmc_init(bd_t *bis)
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{
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return pci_mmc_init("Quark SDHCI", mmc_supported);
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}
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int arch_misc_init(void)
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int arch_misc_init(void)
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{
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{
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#ifdef CONFIG_ENABLE_MRC_CACHE
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#ifdef CONFIG_ENABLE_MRC_CACHE
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@ -5,4 +5,4 @@
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#
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#
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obj-y += fsp_configs.o irq.o
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obj-y += fsp_configs.o irq.o
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obj-y += tnc.o
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obj-y += tnc.o topcliff.o
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20
arch/x86/cpu/queensbay/topcliff.c
Normal file
20
arch/x86/cpu/queensbay/topcliff.c
Normal file
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@ -0,0 +1,20 @@
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/*
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mmc.h>
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#include <pci_ids.h>
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static struct pci_device_id mmc_supported[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
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{},
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};
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int cpu_mmc_init(bd_t *bis)
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{
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return pci_mmc_init("Topcliff SDHCI", mmc_supported);
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}
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@ -6,71 +6,37 @@
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*/
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*/
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#include <common.h>
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <errno.h>
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#include <malloc.h>
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#include <malloc.h>
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#include <mapmem.h>
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#include <sdhci.h>
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#include <sdhci.h>
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#include <asm/pci.h>
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#include <asm/pci.h>
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struct pci_mmc_plat {
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int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported)
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struct mmc_config cfg;
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struct mmc mmc;
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};
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struct pci_mmc_priv {
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struct sdhci_host host;
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void *base;
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};
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static int pci_mmc_probe(struct udevice *dev)
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{
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct sdhci_host *mmc_host;
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struct pci_mmc_plat *plat = dev_get_platdata(dev);
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u32 iobase;
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struct pci_mmc_priv *priv = dev_get_priv(dev);
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struct sdhci_host *host = &priv->host;
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u32 ioaddr;
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int ret;
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int ret;
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int i;
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dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &ioaddr);
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for (i = 0; ; i++) {
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host->ioaddr = map_sysmem(ioaddr, 0);
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struct udevice *dev;
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host->name = dev->name;
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ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
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ret = pci_find_device_id(mmc_supported, i, &dev);
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if (ret)
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if (ret)
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return ret;
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return ret;
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host->mmc = &plat->mmc;
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mmc_host = malloc(sizeof(struct sdhci_host));
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host->mmc->priv = &priv->host;
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if (!mmc_host)
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host->mmc->dev = dev;
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return -ENOMEM;
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upriv->mmc = host->mmc;
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return sdhci_probe(dev);
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mmc_host->name = name;
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dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase);
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mmc_host->ioaddr = (void *)(ulong)iobase;
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mmc_host->quirks = 0;
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mmc_host->max_clk = 0;
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ret = add_sdhci(mmc_host, 0, 0);
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if (ret)
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return ret;
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}
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return 0;
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}
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}
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static int pci_mmc_bind(struct udevice *dev)
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{
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struct pci_mmc_plat *plat = dev_get_platdata(dev);
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return sdhci_bind(dev, &plat->mmc, &plat->cfg);
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}
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U_BOOT_DRIVER(pci_mmc) = {
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.name = "pci_mmc",
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.id = UCLASS_MMC,
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.bind = pci_mmc_bind,
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.probe = pci_mmc_probe,
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.ops = &sdhci_ops,
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.priv_auto_alloc_size = sizeof(struct pci_mmc_priv),
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.platdata_auto_alloc_size = sizeof(struct pci_mmc_plat),
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};
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static struct pci_device_id mmc_supported[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1) },
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{},
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};
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U_BOOT_PCI_DEVICE(pci_mmc, mmc_supported);
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@ -585,6 +585,18 @@ int cpu_mmc_init(bd_t *bis);
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int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
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int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
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int mmc_get_env_dev(void);
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int mmc_get_env_dev(void);
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struct pci_device_id;
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/**
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* pci_mmc_init() - set up PCI MMC devices
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*
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* This finds all the matching PCI IDs and sets them up as MMC devices.
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*
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* @name: Name to use for devices
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* @mmc_supported: PCI IDs to search for, terminated by {0, 0}
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*/
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int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported);
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/* Set block count limit because of 16 bit register limit on some hardware*/
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/* Set block count limit because of 16 bit register limit on some hardware*/
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#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
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#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
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#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
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#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
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