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rockchip: px30: add the serial flash controller

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Add the serial flash controller to the devicetree for the PX30.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Chris Morgan 2021-08-05 16:26:40 +08:00 • committed by Kever Yang
parent 6633b4d837
commit 08b097c32f
1 changed files with 38 additions and 0 deletions
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38
arch/arm/dts/px30.dtsi
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@ -960,6 +960,18 @@
status = "disabled";
};
sfc: sfc@ff3a0000 {
compatible = "rockchip,sfc";
reg = <0x0 0xff3a0000 0x0 0x4000>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
clock-names = "clk_sfc", "hclk_sfc";
pinctrl-names = "default";
pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus4>;
power-domains = <&power PX30_PD_MMC_NAND>;
status = "disabled";
};
gpu: gpu@ff400000 {
compatible = "rockchip,px30-mali", "arm,mali-bifrost";
reg = <0x0 0xff400000 0x0 0x4000>;
@ -1926,6 +1938,32 @@
};
};
serial_flash {
sfc_bus4: sfc-bus4 {
rockchip,pins =
<1 RK_PA0 3 &pcfg_pull_none>,
<1 RK_PA1 3 &pcfg_pull_none>,
<1 RK_PA2 3 &pcfg_pull_none>,
<1 RK_PA3 3 &pcfg_pull_none>;
};
sfc_bus2: sfc-bus2 {
rockchip,pins =
<1 RK_PA0 3 &pcfg_pull_none>,
<1 RK_PA1 3 &pcfg_pull_none>;
};
sfc_cs: sfc-cs {
rockchip,pins =
<1 RK_PA4 3 &pcfg_pull_none>;
};
sfc_clk: sfc-clk {
rockchip,pins =
<1 RK_PB1 3 &pcfg_pull_none>;
};
};
lcdc {
lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
rockchip,pins =