* Patch by Christian Hohnstaedt, 23 Apr 2004:

JFFS2 speed enhancements:
  - repair header CRC calculation in jffs2_1pass.c
  - add eraseblock size to the partition information to skip empty
    eraseblocks if we find more then 4k of free space.
  - The JFFS2 scanner is now fast enough to remove the spinning wheel
    so #ifdef-ed out.
  - add watchdog calls in long running loops

* Patch by Philippe Robin, 22 Apr 2004:
  Fix ethernet configuration for "versatile" board

* Patch by Kshitij Gupta, 21 Apr 2004:
  Remove busy loop and use MPU timer fr usleep() on OMAP1510/1610 boards

* Patch by Steven Scholz, 24 Feb 2004:
  Fix a bug in AT91RM9200 ethernet driver:
  The MII interface is now initialized before accessing the PHY.

* Cleanup PCI ID's

CHANGELOG

@@ -2,6 +2,25 @@
 Changes for U-Boot 1.1.1:
 ======================================================================
 
+* Patch by Christian Hohnstaedt, 23 Apr 2004:
+  JFFS2 speed enhancements:
+  - repair header CRC calculation in jffs2_1pass.c
+  - add eraseblock size to the partition information to skip empty
+    eraseblocks if we find more then 4k of free space.
+  - The JFFS2 scanner is now fast enough to remove the spinning wheel
+    so #ifdef-ed out.
+  - add watchdog calls in long running loops
+
+* Patch by Philippe Robin, 22 Apr 2004:
+  Fix ethernet configuration for "versatile" board 
+
+* Patch by Kshitij Gupta, 21 Apr 2004:
+  Remove busy loop and use MPU timer fr usleep() on OMAP1510/1610 boards
+
+* Patch by Steven Scholz, 24 Feb 2004:
+  Fix a bug in AT91RM9200 ethernet driver:
+  The MII interface is now initialized before accessing the PHY.
+
 * Patch by John Kerl, 19 Apr 2004:
   Use U-boot's miiphy.h for PHY register names, rather than
   introducing a new header file.

common/cmd_jffs2.c

@@ -80,8 +80,14 @@ jffs2_part_info(int part_num)
 			flash_info[CFG_JFFS2_FIRST_BANK].start[0];
 #endif
 
-		/* unused in current jffs2 loader */
+		/* FIXME: Fast hack to get erase size set */
-		part.erasesize = 0;
+
+		/* We assume that our JFFS2 partition has
+		 * all erase blocks with the same size
+		 * If we have a clue about the erasesize
+		 * we can skip empty blocks
+		 */
+		part.erasesize = PHYS_FLASH_SECT_SIZE;
 
 		/* Mark the struct as ready */
 		part.usr_priv=(void*)1;

cpu/arm925t/interrupts.c

@@ -215,16 +215,9 @@ void set_timer (ulong t)
 	timestamp = t;
 }
 
-/* delay x useconds AND perserve advance timstamp value */
+/* delay x useconds AND preserve advance timestamp value */
 void udelay (unsigned long usec)
 {
-#ifdef CONFIG_INNOVATOROMAP1510
-#define LOOPS_PER_MSEC 60		/* tuned on omap1510 */
-	volatile int i, time_remaining = LOOPS_PER_MSEC * usec;
-
-	for (i = time_remaining; i > 0; i--) {
-	}
-#else
 	ulong tmo, tmp;
 
 	if(usec >= 1000){		/* if "big" number, spread normalization to seconds */
@@ -244,7 +237,6 @@ void udelay (unsigned long usec)
 
 	while (get_timer_masked () < tmo) /* loop till event */
 		/*NOP*/;
-#endif
 }
 
 void reset_timer_masked (void)

cpu/at91rm9200/at91rm9200_ether.c

@@ -378,14 +378,21 @@ int eth_init (bd_t * bd)
 
 	p_mac = AT91C_BASE_EMAC;
 
-	*AT91C_PIOA_PDR = AT91C_PA16_EMDIO | AT91C_PA15_EMDC | AT91C_PA14_ERXER | AT91C_PA13_ERX1 | AT91C_PA12_ERX0 | AT91C_PA11_ECRS_ECRSDV | AT91C_PA10_ETX1 | AT91C_PA9_ETX0 | AT91C_PA8_ETXEN | AT91C_PA7_ETXCK_EREFCK;	/* PIO Disable Register */
+	/* PIO Disable Register */
+	*AT91C_PIOA_PDR = AT91C_PA16_EMDIO | AT91C_PA15_EMDC | AT91C_PA14_ERXER |
+			  AT91C_PA13_ERX1 | AT91C_PA12_ERX0 | AT91C_PA11_ECRS_ECRSDV |
+			  AT91C_PA10_ETX1 | AT91C_PA9_ETX0 | AT91C_PA8_ETXEN |
+			  AT91C_PA7_ETXCK_EREFCK;
 
 	*AT91C_PIOB_PDR = AT91C_PB25_EF100 |
 			  AT91C_PB19_ERXCK | AT91C_PB18_ECOL | AT91C_PB17_ERXDV |
 			  AT91C_PB16_ERX3 | AT91C_PB15_ERX2 | AT91C_PB14_ETXER |
 			  AT91C_PB13_ETX3 | AT91C_PB12_ETX2;
 
-	*AT91C_PIOB_BSR = AT91C_PB25_EF100 | AT91C_PB19_ERXCK | AT91C_PB18_ECOL | AT91C_PB17_ERXDV | AT91C_PB16_ERX3 | AT91C_PB15_ERX2 | AT91C_PB14_ETXER | AT91C_PB13_ETX3 | AT91C_PB12_ETX2;	/* Select B Register */
+	/* Select B Register */
+	*AT91C_PIOB_BSR = AT91C_PB25_EF100 | AT91C_PB19_ERXCK | AT91C_PB18_ECOL |
+			  AT91C_PB17_ERXDV | AT91C_PB16_ERX3 | AT91C_PB15_ERX2 |
+			  AT91C_PB14_ETXER | AT91C_PB13_ETX3 | AT91C_PB12_ETX2;
 
 	*AT91C_PMC_PCER = 1 << AT91C_ID_EMAC;	/* Peripheral Clock Enable Register */
 
@@ -400,22 +407,6 @@ int eth_init (bd_t * bd)
 	rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;
 	rbfp = &rbfdt[0];
 
-	at91rm92000_GetPhyInterface ();
-
-	if (!pPhyOps->IsPhyConnected (p_mac))
-		printf ("PHY not connected!!\n\r");
-
-	/* MII management start from here */
-	if (!(p_mac->EMAC_SR & AT91C_EMAC_LINK)) {
-		if (!(ret = pPhyOps->Init (p_mac))) {
-			printf ("MAC: error during MII initialization\n");
-			return 0;
-		}
-	} else {
-		printf ("No link\n\r");
-		return 0;
-	}
-
 	p_mac->EMAC_SA2L = (bd->bi_enetaddr[3] << 24) | (bd->bi_enetaddr[2] << 16)
 			 | (bd->bi_enetaddr[1] <<  8) | (bd->bi_enetaddr[0]);
 	p_mac->EMAC_SA2H = (bd->bi_enetaddr[5] <<  8) | (bd->bi_enetaddr[4]);
@@ -432,6 +423,22 @@ int eth_init (bd_t * bd)
 
 	p_mac->EMAC_CTL |= AT91C_EMAC_TE | AT91C_EMAC_RE;
 
+	at91rm92000_GetPhyInterface ();
+
+	if (!pPhyOps->IsPhyConnected (p_mac))
+		printf ("PHY not connected!!\n\r");
+
+	/* MII management start from here */
+	if (!(p_mac->EMAC_SR & AT91C_EMAC_LINK)) {
+		if (!(ret = pPhyOps->Init (p_mac))) {
+			printf ("MAC: error during MII initialization\n");
+			return 0;
+		}
+	} else {
+		printf ("No link\n\r");
+		return 0;
+	}
+
 	return 0;
 }
 

drivers/ns8382x.c

@@ -266,7 +266,7 @@ static int ns8382x_poll(struct eth_device *dev);
 static void ns8382x_disable(struct eth_device *dev);
 
 static struct pci_device_id supported[] = {
-	{PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_8382x},
+	{PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83820},
 	{}
 };
 

drivers/sk98lin/skge.c

@@ -494,7 +494,7 @@ static struct proc_dir_entry	*pSkRootDir;
 static struct pci_device_id supported[] = {
 	{PCI_VENDOR_ID_3COM, 0x1700},
 	{PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE},
-	{PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE_SA},
+	{PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU},
 	{}
 };
 

fs/jffs2/jffs2_1pass.c

@@ -114,6 +114,7 @@
 #include <common.h>
 #include <config.h>
 #include <malloc.h>
+#include <watchdog.h>
 #include <linux/stat.h>
 #include <linux/time.h>
 
@@ -126,7 +127,7 @@
 
 
 #define	NODE_CHUNK  	1024	/* size of memory allocation chunk in b_nodes */
-#define	SPIN_BLKSIZE	18  	/* spin after having scanned 1<<BLKSIZE bytes */
+#define	SPIN_BLKSIZE	20  	/* spin after having scanned 1<<BLKSIZE bytes */
 
 /* Debugging switches */
 #undef	DEBUG_DIRENTS		/* print directory entry list after scan */
@@ -276,8 +277,10 @@ static char *compr_names[] = {
 	"ZLIB"
 };
 
+#if 0  /* Use spinning wheel */
 /* Spinning wheel */
 static char spinner[] = { '|', '/', '-', '\\' };
+#endif
 
 /* Memory management */
 struct mem_block {
@@ -454,15 +457,24 @@ jffs2_scan_empty(u32 start_offset, struct part_info *part)
 {
 	char *max = part->offset + part->size - sizeof(struct jffs2_raw_inode);
 	char *offset = part->offset + start_offset;
+	int cntr = 0;
 	u32 off;
 
 	while (offset < max &&
 	       *(u32*)get_fl_mem((u32)offset, sizeof(u32), &off) == 0xFFFFFFFF) {
 		offset += sizeof(u32);
+		cntr++;
+#if 0  /* Use spinning wheel */
 		/* return if spinning is due */
 		if (((u32)offset & ((1 << SPIN_BLKSIZE)-1)) == 0) break;
+#endif
+		if (cntr > 1024 && part->erasesize > 0) { /* 4k */
+			/* round up to next erase block border */
+			(u32)offset |= part->erasesize-1;
+			offset++;
+			cntr = 0;
+		}
 	}
-
 	return offset - part->offset;
 }
 
@@ -921,6 +933,9 @@ jffs2_1pass_search_list_inodes(struct b_lists * pL, const char *fname, u32 pino)
 		for (i = 0; i < strlen(c) - 1; i++)
 			tmp[i] = c[i + 1];
 		tmp[i] = '\0';
+
+		WATCHDOG_RESET();
+
 		/* only a failure if we arent looking at top level */
 		if (!(pino = jffs2_1pass_find_inode(pL, working_tmp, pino)) &&
 		    (working_tmp[0])) {
@@ -1061,12 +1076,15 @@ jffs2_1pass_build_lists(struct part_info * part)
 {
 	struct b_lists *pL;
 	struct jffs2_unknown_node *node;
+	struct jffs2_unknown_node crcnode;
 	u32 offset, oldoffset = 0;
 	u32 max = part->size - sizeof(struct jffs2_raw_inode);
 	u32 counter = 0;
 	u32 counter4 = 0;
 	u32 counterF = 0;
 	u32 counterN = 0;
+	u32 counterCRC = 0;
+	u32 counterUNK = 0;
 
 #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
 	nanddev = (int)part->usr_priv - 1;
@@ -1087,14 +1105,26 @@ jffs2_1pass_build_lists(struct part_info * part)
 	/* start at the beginning of the partition */
 	while (offset < max) {
 	    	if ((oldoffset >> SPIN_BLKSIZE) != (offset >> SPIN_BLKSIZE)) {
+			WATCHDOG_RESET();
+#if 0  /* Use spinning wheel */
 			printf("\b\b%c ", spinner[counter++ % sizeof(spinner)]);
+#endif
 			oldoffset = offset;
 		}
-
 		node = (struct jffs2_unknown_node *) get_node_mem((u32)part->offset + offset);
-		if (node->magic == JFFS2_MAGIC_BITMASK && hdr_crc(node)) {
+		if (node->magic == JFFS2_MAGIC_BITMASK) {
 			/* if its a fragment add it */
-			if (node->nodetype == JFFS2_NODETYPE_INODE &&
+			/* check crc by readding a JFFS2_NODE_ACCURATE */
+			crcnode.magic = node->magic;
+			crcnode.nodetype = node->nodetype | JFFS2_NODE_ACCURATE;
+			crcnode.totlen = node->totlen;
+			crcnode.hdr_crc = node->hdr_crc;
+
+			if (!hdr_crc(&crcnode)) {
+				offset += 4;
+				counterCRC++;
+				continue;
+			} else if (node->nodetype == JFFS2_NODETYPE_INODE &&
 				    inode_crc((struct jffs2_raw_inode *) node)) {
 				if (insert_node(&pL->frag, (u32) part->offset +
 						offset) == NULL) {
@@ -1104,8 +1134,12 @@ jffs2_1pass_build_lists(struct part_info * part)
 			} else if (node->nodetype == JFFS2_NODETYPE_DIRENT &&
 				   dirent_crc((struct jffs2_raw_dirent *) node)  &&
 				   dirent_name_crc((struct jffs2_raw_dirent *) node)) {
-				if (! (counterN%100))
+				if (! (counterN%128))
+#if 0  /* Use spinning wheel */
 					puts ("\b\b.  ");
+#else
+					puts (".");
+#endif
 				if (insert_node(&pL->dir, (u32) part->offset +
 						offset) == NULL) {
 					put_fl_mem(node);
@@ -1123,9 +1157,7 @@ jffs2_1pass_build_lists(struct part_info * part)
 						"%d < %d\n", node->totlen,
 						sizeof(struct jffs2_unknown_node));
 			} else {
-				printf("Unknown node type: %x len %d "
+				counterUNK++;
-					"offset 0x%x\n", node->nodetype,
-					node->totlen, offset);
 			}
 			offset += ((node->totlen + 3) & ~3);
 			counterF++;
@@ -1149,6 +1181,8 @@ jffs2_1pass_build_lists(struct part_info * part)
 	putLabeledWord("frag entries = ", pL->frag.listCount);
 	putLabeledWord("+4 increments = ", counter4);
 	putLabeledWord("+file_offset increments = ", counterF);
+	putLabeledWord("Unknown node types = ", counterUNK);
+	putLabeledWord("Bad hdr_crc = ", counterCRC);
 
 #endif
 
@@ -1204,6 +1238,7 @@ jffs2_get_list(struct part_info * part, const char *who)
 			return NULL;
 		}
 	}
+	WATCHDOG_RESET();
 	return (struct b_lists *)part->jffs2_priv;
 }
 
@@ -1213,24 +1248,21 @@ u32
 jffs2_1pass_ls(struct part_info * part, const char *fname)
 {
 	struct b_lists *pl;
-	long ret = 0;
 	u32 inode;
 
 	if (! (pl = jffs2_get_list(part, "ls")))
 		return 0;
 
+
 	if (! (inode = jffs2_1pass_search_list_inodes(pl, fname, 1))) {
 		putstr("ls: Failed to scan jffs2 file structure\r\n");
 		return 0;
 	}
-
-
 #if 0
 	putLabeledWord("found file at inode = ", inode);
 	putLabeledWord("read_inode returns = ", ret);
 #endif
-
+	return inode;
-	return ret;
 }
 
 

include/configs/versatile.h

@@ -103,7 +103,7 @@
 #include <cmd_confdefs.h>
 
 #define CONFIG_BOOTDELAY	2
-#define CONFIG_BOOTARGS	"root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0"
+#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=25,0,0xf1010000,0xf1010010,eth0"
 /*#define CONFIG_BOOTCOMMAND "bootp ; bootm" */
 
 /*

include/pci_ids.h

@@ -407,6 +407,7 @@
 #define PCI_DEVICE_ID_IBM_MPIC		0x0046
 #define PCI_DEVICE_ID_IBM_3780IDSP	0x007d
 #define PCI_DEVICE_ID_IBM_CHUKAR	0x0096
+#define PCI_DEVICE_ID_IBM_CPC700	0x00f9
 #define PCI_DEVICE_ID_IBM_CPC710_PCI64	0x00fc
 #define PCI_DEVICE_ID_IBM_CPC710_PCI32	0x0105
 #define PCI_DEVICE_ID_IBM_405GP		0x0156
@@ -508,6 +509,7 @@
 #define PCI_DEVICE_ID_CT_65550		0x00e0
 #define PCI_DEVICE_ID_CT_65554		0x00e4
 #define PCI_DEVICE_ID_CT_65555		0x00e5
+#define PCI_DEVICE_ID_CT_69000		0x00c0
 
 #define PCI_VENDOR_ID_MIRO		0x1031
 #define PCI_DEVICE_ID_MIRO_36050	0x5601
@@ -692,10 +694,14 @@
 #define PCI_DEVICE_ID_MOTOROLA_MPC105	0x0001
 #define PCI_DEVICE_ID_MOTOROLA_MPC106	0x0002
 #define PCI_DEVICE_ID_MOTOROLA_MPC107	0x0004
+#define PCI_DEVICE_ID_MOTOROLA_MPC8540	0x0008
+#define PCI_DEVICE_ID_MOTOROLA_MPC8560	0x0009
+#define PCI_DEVICE_ID_MOTOROLA_MPC8265A 0x18c0
 #define PCI_DEVICE_ID_MOTOROLA_RAVEN	0x4801
 #define PCI_DEVICE_ID_MOTOROLA_FALCON	0x4802
 #define PCI_DEVICE_ID_MOTOROLA_HAWK	0x4803
 #define PCI_DEVICE_ID_MOTOROLA_CPX8216	0x4806
+#define PCI_DEVICE_ID_MOTOROLA_MPC190	0x6400
 
 #define PCI_VENDOR_ID_PROMISE		0x105a
 #define PCI_DEVICE_ID_PROMISE_20265	0x0d30
@@ -1440,6 +1446,11 @@
 #define PCI_DEVICE_ID_SATSAGEM_PCR2101	0x5352
 #define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b
 
+#define PCI_VENDOR_ID_SMI		0x126f
+#define PCI_DEVICE_ID_SMI_710		0x0710
+#define PCI_DEVICE_ID_SMI_712		0x0712
+#define PCI_DEVICE_ID_SMI_810		0x0810
+
 #define PCI_VENDOR_ID_HUGHES		0x1273
 #define PCI_DEVICE_ID_HUGHES_DIRECPC	0x0002
 
@@ -1450,6 +1461,9 @@
 
 #define PCI_VENDOR_ID_ROCKWELL		0x127A
 
+#define PCI_VENDOR_ID_DAVICOM		0x1282
+#define PCI_DEVICE_ID_DAVICOM_DM9102A	0x9102
+
 #define PCI_VENDOR_ID_ITE		0x1283
 #define PCI_DEVICE_ID_ITE_IT8172G	0x8172
 #define PCI_DEVICE_ID_ITE_IT8172G_AUDIO 0x0801
@@ -1784,6 +1798,7 @@
 
 #define PCI_VENDOR_ID_INTEL		0x8086
 #define PCI_DEVICE_ID_INTEL_21145	0x0039
+#define PCI_DEVICE_ID_INTEL_21152BB	0xb152
 #define PCI_DEVICE_ID_INTEL_82375	0x0482
 #define PCI_DEVICE_ID_INTEL_82424	0x0483
 #define PCI_DEVICE_ID_INTEL_82378	0x0484
@@ -1791,6 +1806,21 @@
 #define PCI_DEVICE_ID_INTEL_82434	0x04a3
 #define PCI_DEVICE_ID_INTEL_I960	0x0960
 #define PCI_DEVICE_ID_INTEL_I960RM	0x0962
+#define PCI_DEVICE_ID_INTEL_82542	0x1000
+#define PCI_DEVICE_ID_INTEL_82543GC_FIBER	0x1001
+#define PCI_DEVICE_ID_INTEL_82543GC_COPPER	0x1004
+#define PCI_DEVICE_ID_INTEL_82544EI_COPPER	0x1008
+#define PCI_DEVICE_ID_INTEL_82544EI_FIBER	0x1009
+#define PCI_DEVICE_ID_INTEL_82544GC_COPPER	0x100C
+#define PCI_DEVICE_ID_INTEL_82544GC_LOM		0x100D
+#define PCI_DEVICE_ID_INTEL_82540EM		0x100E
+#define PCI_DEVICE_ID_INTEL_82545EM_COPPER	0x100F
+#define PCI_DEVICE_ID_INTEL_82546EB_COPPER	0x1010
+#define PCI_DEVICE_ID_INTEL_82545EM_FIBER	0x1011
+#define PCI_DEVICE_ID_INTEL_82546EB_FIBER	0x1012
+#define PCI_DEVICE_ID_INTEL_82540EM_LOM		0x1015
+#define PCI_DEVICE_ID_INTEL_82559		0x1030
+
 #define PCI_DEVICE_ID_INTEL_82562ET	0x1031
 
 #define PCI_DEVICE_ID_INTEL_82815_MC	0x1130