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[PATCH] Support for Xilinx EmacLite controller
This commit is contained in:
Michal Simek
parent
5280f352c8
commit
0c0a9cda1b
3 changed files with 425 additions and 1 deletions
3
Makefile
3
Makefile
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@ -143,7 +143,7 @@ ifeq ($(ARCH),m68k)
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CROSS_COMPILE = m68k-elf-
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endif
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ifeq ($(ARCH),microblaze)
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CROSS_COMPILE = mb-
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CROSS_COMPILE = microblaze-uclinux-
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endif
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ifeq ($(ARCH),blackfin)
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CROSS_COMPILE = bfin-uclinux-
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@ -207,6 +207,7 @@ LIBS += dtt/libdtt.a
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LIBS += drivers/libdrivers.a
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LIBS += drivers/nand/libnand.a
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LIBS += drivers/nand_legacy/libnand_legacy.a
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LIBS += drivers/net/libnetdrv.a
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ifeq ($(CPU),mpc83xx)
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LIBS += drivers/qe/qe.a
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endif
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45
drivers/net/Makefile
Normal file
45
drivers/net/Makefile
Normal file
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@ -0,0 +1,45 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB := $(obj)libnetdrv.a
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COBJS := xilinx_emaclite.o
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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all: $(LIB)
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$(LIB): $(obj).depend $(OBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS)
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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378
drivers/net/xilinx_emaclite.c
Normal file
378
drivers/net/xilinx_emaclite.c
Normal file
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@ -0,0 +1,378 @@
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/*
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* (C) Copyright 2007 Michal Simek
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*
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* Michal SIMEK <monstr@monstr.eu>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <net.h>
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#include <config.h>
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#include <asm/io.h>
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#ifdef XILINX_EMACLITE_BASEADDR
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//#define DEBUG
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#define ENET_MAX_MTU PKTSIZE
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#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN
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#define ENET_ADDR_LENGTH 6
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/* EmacLite constants */
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#define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */
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#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
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#define XEL_TSR_OFFSET 0x07FC /* Tx status */
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#define XEL_RSR_OFFSET 0x17FC /* Rx status */
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#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
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/* Xmit complete */
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#define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL
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/* Xmit interrupt enable bit */
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#define XEL_TSR_XMIT_IE_MASK 0x00000008UL
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/* Buffer is active, SW bit only */
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#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL
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/* Program the MAC address */
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#define XEL_TSR_PROGRAM_MASK 0x00000002UL
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/* define for programming the MAC address into the EMAC Lite */
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#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
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/* Transmit packet length upper byte */
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#define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL
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/* Transmit packet length lower byte */
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#define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL
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/* Recv complete */
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#define XEL_RSR_RECV_DONE_MASK 0x00000001UL
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/* Recv interrupt enable bit */
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#define XEL_RSR_RECV_IE_MASK 0x00000008UL
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typedef struct {
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unsigned int BaseAddress; /* Base address for device (IPIF) */
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unsigned int NextTxBufferToUse; /* Next TX buffer to write to */
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unsigned int NextRxBufferToUse; /* Next RX buffer to read from */
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unsigned char DeviceId; /* Unique ID of device - for future */
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} XEmacLite;
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static XEmacLite EmacLite;
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static char etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */
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/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/
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#ifdef CFG_ENV_IS_NOWHERE
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static u8 EMACAddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 };
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#endif
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void XEmacLite_AlignedRead (u32 * SrcPtr, void *DestPtr, unsigned ByteCount)
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{
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unsigned i;
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unsigned Length = ByteCount;
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u32 AlignBuffer;
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u32 *To32Ptr;
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u32 *From32Ptr;
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u8 *To8Ptr;
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u8 *From8Ptr;
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From32Ptr = (u32 *) SrcPtr;
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/* Word aligned buffer, no correction needed. */
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To32Ptr = (u32 *) DestPtr;
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while (Length > 3) {
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*To32Ptr++ = *From32Ptr++;
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Length -= 4;
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}
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To8Ptr = (u8 *) To32Ptr;
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AlignBuffer = *From32Ptr++;
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From8Ptr = (u8 *) & AlignBuffer;
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for (i = 0; i < Length; i++) {
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*To8Ptr++ = *From8Ptr++;
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}
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}
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void XEmacLite_AlignedWrite (void *SrcPtr, u32 * DestPtr, unsigned ByteCount)
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{
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unsigned i;
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unsigned Length = ByteCount;
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u32 AlignBuffer;
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u32 *To32Ptr;
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u32 *From32Ptr;
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u8 *To8Ptr;
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u8 *From8Ptr;
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To32Ptr = DestPtr;
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From32Ptr = (u32 *) SrcPtr;
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while (Length > 3) {
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*To32Ptr++ = *From32Ptr++;
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Length -= 4;
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}
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AlignBuffer = 0;
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To8Ptr = (u8 *) & AlignBuffer;
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From8Ptr = (u8 *) From32Ptr;
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for (i = 0; i < Length; i++) {
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*To8Ptr++ = *From8Ptr++;
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}
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*To32Ptr++ = AlignBuffer;
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}
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void eth_halt (void)
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{
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#ifdef DEBUG
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puts ("eth_halt\n");
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#endif
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}
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int eth_init (bd_t * bis)
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{
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#ifdef DEBUG
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puts ("EmacLite Initialization Started\n");
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#endif
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memset (&EmacLite, 0, sizeof (XEmacLite));
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EmacLite.BaseAddress = XILINX_EMACLITE_BASEADDR;
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#ifdef CFG_ENV_IS_NOWHERE
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memcpy (bis->bi_enetaddr, EMACAddr, ENET_ADDR_LENGTH);
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#endif
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/*
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* TX - TX_PING & TX_PONG initialization
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*/
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/* Restart PING TX */
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out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, 0);
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/* Copy MAC address */
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XEmacLite_AlignedWrite (bis->bi_enetaddr,
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EmacLite.BaseAddress, ENET_ADDR_LENGTH);
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/* Set the length */
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out_be32 (EmacLite.BaseAddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
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/* Update the MAC address in the EMAC Lite */
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out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR);
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/* Wait for EMAC Lite to finish with the MAC address update */
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while ((in_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET) &
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XEL_TSR_PROG_MAC_ADDR) != 0) ;
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#ifdef XILINX_EMACLITE_TX_PING_PONG
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/* The same operation with PONG TX */
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out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
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XEmacLite_AlignedWrite (bis->bi_enetaddr,
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EmacLite.BaseAddress + XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
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out_be32 (EmacLite.BaseAddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
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out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
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XEL_TSR_PROG_MAC_ADDR);
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while ((in_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET +
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XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ;
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#endif
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/*
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* RX - RX_PING & RX_PONG initialization
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*/
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/* Write out the value to flush the RX buffer */
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out_be32 (EmacLite.BaseAddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);
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#ifdef XILINX_EMACLITE_RX_PING_PONG
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out_be32 (EmacLite.BaseAddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
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XEL_RSR_RECV_IE_MASK);
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#endif
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#ifdef DEBUG
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puts ("EmacLite Initialization complete\n");
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#endif
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return 0;
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}
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int XEmacLite_TxBufferAvailable (XEmacLite * InstancePtr)
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{
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u32 Register;
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u32 TxPingBusy;
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u32 TxPongBusy;
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/*
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* Read the other buffer register
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* and determine if the other buffer is available
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*/
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Register = in_be32 (InstancePtr->BaseAddress +
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InstancePtr->NextTxBufferToUse + 0);
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TxPingBusy = ((Register & XEL_TSR_XMIT_BUSY_MASK) ==
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XEL_TSR_XMIT_BUSY_MASK);
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Register = in_be32 (InstancePtr->BaseAddress +
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(InstancePtr->NextTxBufferToUse ^ XEL_TSR_OFFSET) + 0);
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TxPongBusy = ((Register & XEL_TSR_XMIT_BUSY_MASK) ==
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XEL_TSR_XMIT_BUSY_MASK);
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return (!(TxPingBusy && TxPongBusy));
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}
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int eth_send (volatile void *ptr, int len) {
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unsigned int Register;
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unsigned int BaseAddress;
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unsigned maxtry = 1000;
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if (len > ENET_MAX_MTU)
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len = ENET_MAX_MTU;
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while (!XEmacLite_TxBufferAvailable (&EmacLite) && maxtry) {
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udelay (10);
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maxtry--;
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}
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if (!maxtry) {
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printf ("Error: Timeout waiting for ethernet TX buffer\n");
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/* Restart PING TX */
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out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, 0);
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#ifdef XILINX_EMACLITE_TX_PING_PONG
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out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET +
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XEL_BUFFER_OFFSET, 0);
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#endif
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return 0;
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}
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/* Determine the expected TX buffer address */
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BaseAddress = (EmacLite.BaseAddress + EmacLite.NextTxBufferToUse);
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/* Determine if the expected buffer address is empty */
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Register = in_be32 (BaseAddress + XEL_TSR_OFFSET);
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if (((Register & XEL_TSR_XMIT_BUSY_MASK) == 0)
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&& ((in_be32 ((BaseAddress) + XEL_TSR_OFFSET)
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& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
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#ifdef XILINX_EMACLITE_TX_PING_PONG
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EmacLite.NextTxBufferToUse ^= XEL_BUFFER_OFFSET;
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#endif
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#ifdef DEBUG
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printf ("Send packet from 0x%x\n", BaseAddress);
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#endif
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/* Write the frame to the buffer */
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XEmacLite_AlignedWrite (ptr, (u32 *) BaseAddress, len);
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out_be32 (BaseAddress + XEL_TPLR_OFFSET,(len &
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(XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)));
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Register = in_be32 (BaseAddress + XEL_TSR_OFFSET);
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Register |= XEL_TSR_XMIT_BUSY_MASK;
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if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) {
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Register |= XEL_TSR_XMIT_ACTIVE_MASK;
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}
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out_be32 (BaseAddress + XEL_TSR_OFFSET, Register);
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return 1;
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}
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#ifdef XILINX_EMACLITE_TX_PING_PONG
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/* Switch to second buffer */
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BaseAddress ^= XEL_BUFFER_OFFSET;
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/* Determine if the expected buffer address is empty */
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Register = in_be32 (BaseAddress + XEL_TSR_OFFSET);
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if (((Register & XEL_TSR_XMIT_BUSY_MASK) == 0)
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&& ((in_be32 ((BaseAddress) + XEL_TSR_OFFSET)
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& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
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#ifdef DEBUG
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printf ("Send packet from 0x%x\n", BaseAddress);
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#endif
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/* Write the frame to the buffer */
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XEmacLite_AlignedWrite (ptr, (u32 *) BaseAddress, len);
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out_be32 (BaseAddress + XEL_TPLR_OFFSET,(len &
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(XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)));
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Register = in_be32 (BaseAddress + XEL_TSR_OFFSET);
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Register |= XEL_TSR_XMIT_BUSY_MASK;
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if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) {
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Register |= XEL_TSR_XMIT_ACTIVE_MASK;
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}
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out_be32 (BaseAddress + XEL_TSR_OFFSET, Register);
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return 1;
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}
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#endif
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puts ("Error while sending frame\n");
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return 0;
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}
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int eth_rx (void)
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{
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unsigned int Length;
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unsigned int Register;
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unsigned int BaseAddress;
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BaseAddress = EmacLite.BaseAddress + EmacLite.NextRxBufferToUse;
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Register = in_be32 (BaseAddress + XEL_RSR_OFFSET);
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#ifdef DEBUG
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// printf ("Testing data at address 0x%x\n", BaseAddress);
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#endif
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if ((Register & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
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#ifdef XILINX_EMACLITE_RX_PING_PONG
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EmacLite.NextRxBufferToUse ^= XEL_BUFFER_OFFSET;
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#endif
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} else {
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#ifndef XILINX_EMACLITE_RX_PING_PONG
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#ifdef DEBUG
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// printf ("No data was available - address 0x%x\n", BaseAddress);
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#endif
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return 0;
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#else
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BaseAddress ^= XEL_BUFFER_OFFSET;
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Register = in_be32 (BaseAddress + XEL_RSR_OFFSET);
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if ((Register & XEL_RSR_RECV_DONE_MASK) !=
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XEL_RSR_RECV_DONE_MASK) {
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#ifdef DEBUG
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// printf ("No data was available - address 0x%x\n",
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// BaseAddress);
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#endif
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return 0;
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}
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#endif
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}
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/* Get the length of the frame that arrived */
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switch(((in_be32(BaseAddress + XEL_RXBUFF_OFFSET + 0xC)) &
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0xFFFF0000 ) >> 16) {
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case 0x806:
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Length = 42 + 20; /* FIXME size of ARP */
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#ifdef DEBUG
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puts ("ARP Packet\n");
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#endif
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break;
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case 0x800:
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Length = 14 + 14 +
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(((in_be32(BaseAddress + XEL_RXBUFF_OFFSET + 0x10)) &
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0xFFFF0000) >> 16); /* FIXME size of IP packet */
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#ifdef DEBUG
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puts("IP Packet\n");
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#endif
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break;
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default:
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#ifdef DEBUG
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puts("Other Packet\n");
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#endif
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Length = ENET_MAX_MTU;
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break;
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}
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XEmacLite_AlignedRead ((BaseAddress + XEL_RXBUFF_OFFSET),
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etherrxbuff, Length);
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/* Acknowledge the frame */
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Register = in_be32 (BaseAddress + XEL_RSR_OFFSET);
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Register &= ~XEL_RSR_RECV_DONE_MASK;
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out_be32 (BaseAddress + XEL_RSR_OFFSET, Register);
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#ifdef DEBUG
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printf ("Packet receive from 0x%x, length %dB\n", BaseAddress, Length);
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#endif
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NetReceive ((uchar *) etherrxbuff, Length);
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return 1;
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}
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#endif
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||||
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Reference in a new issue