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ls102xa: etsec: Select ge0_clk125 for eTSEC clock muxing as default

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This patch reverts to use ge0_clk125 for eTSEC clock muxing. For SAI and
CAN which are pin multiplexed with RGMII1 in EC1 of RCW, ge2_clk125 will
be used via hwconfig.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Alison Wang 2014-12-09 17:38:23 +08:00 • committed by York Sun
parent dda3b610ee
commit 0f5e5579f2
2 changed files with 36 additions and 1 deletions
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2
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
View file

@ -105,6 +105,8 @@ struct ccsr_gur {
#define SCFG_ETSECDMAMCR_LE_BD_FR 0xf8001a0f
#define SCFG_ETSECCMCR_GE2_CLK125 0x04000000
#define SCFG_ETSECCMCR_GE0_CLK125 0x00000000
#define SCFG_ETSECCMCR_GE1_CLK125 0x08000000
#define SCFG_PIXCLKCR_PXCKEN 0x80000000
#define SCFG_QSPI_CLKSEL 0xc0100000

35
board/freescale/ls1021aqds/ls1021aqds.c
View file

@ -48,6 +48,12 @@ enum {
MUX_TYPE_SD_PC_SG_SG,
};
enum {
GE0_CLK125,
GE2_CLK125,
GE1_CLK125,
};
int checkboard(void)
{
#ifndef CONFIG_QSPI_BOOT
@ -177,7 +183,6 @@ int board_early_init_f(void)
#ifdef CONFIG_TSEC_ENET
out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125);
#endif
#ifdef CONFIG_FSL_IFC
@ -241,6 +246,32 @@ void board_init_f(ulong dummy)
}
#endif
void config_etseccm_source(int etsec_gtx_125_mux)
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
switch (etsec_gtx_125_mux) {
case GE0_CLK125:
out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE0_CLK125);
debug("etseccm set to GE0_CLK125\n");
break;
case GE2_CLK125:
out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125);
debug("etseccm set to GE2_CLK125\n");
break;
case GE1_CLK125:
out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE1_CLK125);
debug("etseccm set to GE1_CLK125\n");
break;
default:
printf("Error! trying to set etseccm to invalid value\n");
break;
}
}
int config_board_mux(int ctrl_type)
{
u8 reg12, reg14;
@ -250,6 +281,7 @@ int config_board_mux(int ctrl_type)
switch (ctrl_type) {
case MUX_TYPE_CAN:
config_etseccm_source(GE2_CLK125);
reg14 = SET_EC_MUX_SEL(reg14, PIN_MUX_SEL_CAN);
break;
case MUX_TYPE_IIC2:
@ -259,6 +291,7 @@ int config_board_mux(int ctrl_type)
reg14 = SET_EC_MUX_SEL(reg14, PIN_MUX_SEL_RGMII);
break;
case MUX_TYPE_SAI:
config_etseccm_source(GE2_CLK125);
reg14 = SET_EC_MUX_SEL(reg14, PIN_MUX_SEL_SAI);
break;
case MUX_TYPE_SDHC: