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Merge git://git.denx.de/u-boot-mpc85xx
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commit
0ff27d4a94
5 changed files with 38 additions and 17 deletions
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@ -205,8 +205,7 @@ void cpu_init_f (volatile immap_t * im)
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/* Pointer is writable since we allocated a register for it */
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gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
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/* Clear initial global data */
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memset ((void *) gd, 0, sizeof (gd_t));
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/* global data region was cleared in start.S */
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/* system performance tweaking */
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clrsetbits_be32(&im->arbiter.acr, acr_mask, acr_val);
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@ -18,14 +18,10 @@ DECLARE_GLOBAL_DATA_PTR;
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*/
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void cpu_init_f (volatile immap_t * im)
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{
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int i;
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/* Pointer is writable since we allocated a register for it */
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gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
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/* Clear initial global data */
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for (i = 0; i < sizeof(gd_t); i++)
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((char *)gd)[i] = 0;
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/* global data region was cleared in start.S */
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/* system performance tweaking */
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@ -258,14 +258,40 @@ in_flash:
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#endif
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/* set up the stack pointer in our newly created
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* cache-ram (r1) */
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lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
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ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
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* cache-ram; use r3 to keep the new SP for now to
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* avoid overiding the SP it uselessly */
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lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
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ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
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/* r4 = end of GD area */
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addi r4, r3, GENERATED_GBL_DATA_SIZE
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/* Zero GD area */
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li r0, 0
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1:
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subi r4, r4, 1
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stb r0, 0(r4)
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cmplw r3, r4
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bne 1b
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#ifdef CONFIG_SYS_MALLOC_F_LEN
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#if CONFIG_SYS_MALLOC_F_LEN + GENERATED_GBL_DATA_SIZE > CONFIG_SYS_INIT_RAM_SIZE
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#error "CONFIG_SYS_MALLOC_F_LEN too large to fit into initial RAM."
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#endif
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/* r3 = new stack pointer / pre-reloc malloc area */
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subi r3, r3, CONFIG_SYS_MALLOC_F_LEN
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/* Set pointer to pre-reloc malloc area in GD */
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stw r3, GD_MALLOC_BASE(r4)
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#endif
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li r0, 0 /* Make room for stack frame header and */
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stwu r0, -4(r1) /* clear final stack frame so that */
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stwu r0, -4(r1) /* stack backtraces terminate cleanly */
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stwu r0, -4(r3) /* clear final stack frame so that */
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stwu r0, -4(r3) /* stack backtraces terminate cleanly */
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/* Finally, actually set SP */
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mr r1, r3
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/* let the C-code set up the rest */
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/* */
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@ -1373,8 +1373,8 @@ icache_enable:
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mtlr r8
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isync
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mfspr r4,L1CSR1
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ori r4,r4,0x0001
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oris r4,r4,0x0001
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ori r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@l
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oris r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@h
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mtspr L1CSR1,r4
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isync
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blr
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@ -1402,8 +1402,8 @@ dcache_enable:
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mtlr r8
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isync
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mfspr r0,L1CSR0
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ori r0,r0,0x0001
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oris r0,r0,0x0001
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ori r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@l
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oris r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@h
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msync
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isync
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mtspr L1CSR0,r0
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@ -31,7 +31,7 @@ void *memcpy(void *trg, const void *src, size_t len)
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extern void* __memcpy(void *, const void *, size_t);
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char *s = (char *)src;
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char *t = (char *)trg;
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void *dest = (void *)src;
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void *dest = (void *)trg;
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/*
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* Check is source address is in flash:
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