mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-18 21:21:37 +00:00
- MVEBU Espressobin fixes and enhancements (fix switch security issue, enable MVNETA, enable SD-card, fix COMPHY nodes, default env variables, etc) - MMC Xenon: Set signal voltage and max base clock - a37xx PCI driver: Depend on DM_GPIO and remove #ifdef's
This commit is contained in:
Tom Rini
commit
123f4f84f8
10 changed files with 284 additions and 28 deletions
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@ -159,6 +159,6 @@
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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@ -67,18 +67,29 @@
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
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};
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vcc_sd_reg0: regulator@0 {
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compatible = "regulator-gpio";
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regulator-name = "vcc_sd0";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-type = "voltage";
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states = <1800000 0x1
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3300000 0x0>;
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gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
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};
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};
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&comphy {
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max-lanes = <3>;
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phy0 {
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phy-type = <PHY_TYPE_PEX0>;
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phy-speed = <PHY_SPEED_2_5G>;
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phy-type = <PHY_TYPE_USB3_HOST0>;
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phy-speed = <PHY_SPEED_5G>;
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};
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phy1 {
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phy-type = <PHY_TYPE_USB3_HOST0>;
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phy-speed = <PHY_SPEED_5G>;
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phy-type = <PHY_TYPE_PEX0>;
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phy-speed = <PHY_SPEED_2_5G>;
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};
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phy2 {
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@ -110,6 +121,15 @@
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status = "okay";
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};
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&sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdio_pins>;
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bus-width = <4>;
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cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
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vqmmc-supply = <&vcc_sd_reg0>;
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status = "okay";
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};
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&spi0 {
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status = "okay";
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pinctrl-names = "default";
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@ -145,6 +165,6 @@
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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@ -172,6 +172,6 @@
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
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status = "disabled";
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};
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@ -44,6 +44,7 @@ DECLARE_GLOBAL_DATA_PTR;
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/* Switch Port Registers */
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#define MVEBU_SW_LINK_CTRL_REG (1)
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#define MVEBU_SW_PORT_CTRL_REG (4)
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#define MVEBU_SW_PORT_BASE_VLAN (6)
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/* Global 2 Registers */
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#define MVEBU_G2_SMI_PHY_CMD_REG (24)
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@ -207,8 +208,16 @@ int board_network_enable(struct mii_dev *bus)
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* FIXME: remove this code once Topaz driver gets available
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* A3720 Community Board Only
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* Configure Topaz switch (88E6341)
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* Restrict output to ports 1,2,3 only from port 0 (CPU)
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* Set port 0,1,2,3 to forwarding Mode (through Switch Port registers)
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*/
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(1),
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MVEBU_SW_PORT_BASE_VLAN, BIT(0));
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(2),
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MVEBU_SW_PORT_BASE_VLAN, BIT(0));
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(3),
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MVEBU_SW_PORT_BASE_VLAN, BIT(0));
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(0),
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MVEBU_SW_PORT_CTRL_REG, 0x7f);
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(1),
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@ -234,3 +243,103 @@ int board_network_enable(struct mii_dev *bus)
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return 0;
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}
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#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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int ret;
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int spi_off;
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int parts_off;
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int part_off;
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/* Fill SPI MTD partitions for Linux kernel on Espressobin */
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if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
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return 0;
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spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
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if (spi_off < 0)
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return 0;
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/* Do not touch partitions if they are already defined */
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if (fdt_subnode_offset(blob, spi_off, "partitions") >= 0)
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return 0;
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parts_off = fdt_add_subnode(blob, spi_off, "partitions");
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if (parts_off < 0) {
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printf("Can't add partitions node: %s\n", fdt_strerror(parts_off));
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return 0;
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}
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ret = fdt_setprop_string(blob, parts_off, "compatible", "fixed-partitions");
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if (ret < 0) {
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printf("Can't set compatible property: %s\n", fdt_strerror(ret));
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return 0;
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}
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ret = fdt_setprop_u32(blob, parts_off, "#address-cells", 1);
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if (ret < 0) {
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printf("Can't set #address-cells property: %s\n", fdt_strerror(ret));
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return 0;
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}
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ret = fdt_setprop_u32(blob, parts_off, "#size-cells", 1);
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if (ret < 0) {
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printf("Can't set #size-cells property: %s\n", fdt_strerror(ret));
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return 0;
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}
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/* Add u-boot-env partition */
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part_off = fdt_add_subnode(blob, parts_off, "partition@u-boot-env");
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if (part_off < 0) {
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printf("Can't add partition@u-boot-env node: %s\n", fdt_strerror(part_off));
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return 0;
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}
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ret = fdt_setprop_u32(blob, part_off, "reg", CONFIG_ENV_OFFSET);
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if (ret < 0) {
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printf("Can't set partition@u-boot-env reg property: %s\n", fdt_strerror(ret));
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return 0;
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}
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ret = fdt_appendprop_u32(blob, part_off, "reg", CONFIG_ENV_SIZE);
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if (ret < 0) {
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printf("Can't set partition@u-boot-env reg property: %s\n", fdt_strerror(ret));
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return 0;
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}
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ret = fdt_setprop_string(blob, part_off, "label", "u-boot-env");
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if (ret < 0) {
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printf("Can't set partition@u-boot-env label property: %s\n", fdt_strerror(ret));
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return 0;
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}
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/* Add firmware partition */
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part_off = fdt_add_subnode(blob, parts_off, "partition@firmware");
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if (part_off < 0) {
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printf("Can't add partition@firmware node: %s\n", fdt_strerror(part_off));
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return 0;
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}
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ret = fdt_setprop_u32(blob, part_off, "reg", 0);
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if (ret < 0) {
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printf("Can't set partition@firmware reg property: %s\n", fdt_strerror(ret));
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return 0;
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}
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ret = fdt_appendprop_u32(blob, part_off, "reg", CONFIG_ENV_OFFSET);
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if (ret < 0) {
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printf("Can't set partition@firmware reg property: %s\n", fdt_strerror(ret));
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return 0;
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}
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ret = fdt_setprop_string(blob, part_off, "label", "firmware");
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if (ret < 0) {
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printf("Can't set partition@firmware label property: %s\n", fdt_strerror(ret));
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return 0;
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}
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return 0;
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}
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#endif
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@ -6,7 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_TARGET_MVEBU_ARMADA_37XX=y
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CONFIG_ENV_SIZE=0x10000
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CONFIG_ENV_OFFSET=0x180000
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CONFIG_ENV_OFFSET=0x3F0000
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CONFIG_ENV_SECT_SIZE=0x10000
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CONFIG_DM_GPIO=y
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CONFIG_DEBUG_UART_BASE=0xd0012000
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@ -80,3 +80,6 @@ CONFIG_USB_ETHER_RTL8152=y
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CONFIG_USB_ETHER_SMSC95XX=y
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CONFIG_SHA1=y
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CONFIG_SHA256=y
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CONFIG_MVNETA=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_OF_BOARD_SETUP=y
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@ -13,7 +13,8 @@ Build Procedure
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2. Set the cross compiler:
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# export CROSS_COMPILE=/path/to/toolchain/aarch64-marvell-linux-gnu-
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# sudo apt-get install gcc-aarch64-linux-gnu
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# export CROSS_COMPILE=aarch64-linux-gnu-
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3. Clean-up old residuals:
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@ -30,7 +31,7 @@ Build Procedure
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5. Configure the device-tree and build the U-Boot image:
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Compile u-boot and set the required device-tree using:
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For the Armada-70x0/80x0 DB board compile u-boot and set the required device-tree using:
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# make DEVICE_TREE=<name>
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@ -42,12 +43,45 @@ Build Procedure
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In order to prevent this, the required device-tree MUST be set during compilation.
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All device-tree files are located in ./arch/arm/dts/ folder.
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For other DB boards (MacchiatoBin, EspressoBin and 3700 DB board) compile u-boot with
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just default device-tree from defconfig using:
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# make
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NOTE:
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The u-boot.bin should not be used as a stand-alone image.
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The ARM Trusted Firmware (ATF) build process uses this image to generate the
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flash image.
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flash image. See TF-A Build Instructions for Marvell Platforms for more details at:
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https://trustedfirmware-a.readthedocs.io/en/latest/plat/marvell/armada/build.html
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Configuration update
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---------------------
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To update the U-Boot configuration, please refer to doc/README.kconfig
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Permanent ethernet MAC address
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-------------------------------
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Prior flashing new U-Boot version (as part of ATF image) it is suggested to backup
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permanent ethernet MAC address as it is stored only in U-Boot env storage (SPI or eMMC).
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Some boards like EspressoBin have MAC address printed on sticker. To print current MAC
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address run:
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# echo $ethaddr
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MAC addresses 00:51:82:11:22:00, 00:51:82:11:22:01, 00:51:82:11:22:02, 00:51:82:11:22:03
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and F0:AD:4E:03:64:7F are default hardcoded values found in Marvell's and Armbian U-Boot
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forks and therefore *not* unique. Usage of static hardcoded MAC addresses should be avoided.
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When original address is lost (e.g. erased by Armbian boot scripts for EspressoBin) it is
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suggested to generate new random one.
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After flashing new U-Boot version it is suggested to reset U-Boot env variables to default
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and then set correct permanent ethernet MAC address.
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# env default -a
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# setenv ethaddr XX:XX:XX:XX:XX:XX
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# saveenv
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Where XX:XX:XX:XX:XX:XX is permanent ethernet MAC address.
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Recent Linux kernel versions use correct permanent ethernet MAC address from U-Boot env as
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U-Boot will inject it into kernel's device-tree.
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@ -22,6 +22,7 @@
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#include <linux/libfdt.h>
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#include <malloc.h>
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#include <sdhci.h>
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#include <power/regulator.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -42,6 +43,14 @@ DECLARE_GLOBAL_DATA_PTR;
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#define SDHC_SYS_EXT_OP_CTRL 0x010C
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#define MASK_CMD_CONFLICT_ERROR BIT(8)
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#define SDHC_SLOT_EMMC_CTRL 0x0130
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#define ENABLE_DATA_STROBE_SHIFT 24
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#define SET_EMMC_RSTN_SHIFT 16
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#define EMMC_VCCQ_MASK 0x3
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#define EMMC_VCCQ_1_8V 0x1
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#define EMMC_VCCQ_1_2V 0x2
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#define EMMC_VCCQ_3_3V 0x3
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#define SDHC_SLOT_RETUNING_REQ_CTRL 0x0144
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/* retuning compatible */
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#define RETUNING_COMPATIBLE 0x1
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@ -108,6 +117,8 @@ DECLARE_GLOBAL_DATA_PTR;
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#define MMC_TIMING_MMC_HS400 10
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#define XENON_MMC_MAX_CLK 400000000
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#define XENON_MMC_3V3_UV 3300000
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#define XENON_MMC_1V8_UV 1800000
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enum soc_pad_ctrl_type {
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SOC_PAD_SD,
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@ -128,6 +139,8 @@ struct xenon_sdhci_priv {
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void *pad_ctrl_reg;
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int pad_type;
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struct udevice *vqmmc;
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};
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static int xenon_mmc_phy_init(struct sdhci_host *host)
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@ -208,6 +221,51 @@ static void armada_3700_soc_pad_voltage_set(struct sdhci_host *host)
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writel(ARMADA_3700_SOC_PAD_3_3V, priv->pad_ctrl_reg);
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}
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static int xenon_mmc_start_signal_voltage_switch(struct sdhci_host *host)
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{
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struct xenon_sdhci_priv *priv = host->mmc->priv;
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u8 voltage;
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u32 ctrl;
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int ret = 0;
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/* If there is no vqmmc regulator, return */
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if (!priv->vqmmc)
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return 0;
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if (priv->pad_type == SOC_PAD_FIXED_1_8V) {
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/* Switch to 1.8v */
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ret = regulator_set_value(priv->vqmmc,
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XENON_MMC_1V8_UV);
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} else if (priv->pad_type == SOC_PAD_SD) {
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/* Get voltage info */
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voltage = sdhci_readb(host, SDHCI_POWER_CONTROL);
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voltage &= ~SDHCI_POWER_ON;
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if (voltage == SDHCI_POWER_330) {
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/* Switch to 3.3v */
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ret = regulator_set_value(priv->vqmmc,
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XENON_MMC_3V3_UV);
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} else {
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/* Switch to 1.8v */
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ret = regulator_set_value(priv->vqmmc,
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XENON_MMC_1V8_UV);
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}
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}
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/* Set VCCQ, eMMC mode: 1.8V; SD/SDIO mode: 3.3V */
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ctrl = sdhci_readl(host, SDHC_SLOT_EMMC_CTRL);
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if (IS_SD(host->mmc))
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ctrl |= EMMC_VCCQ_3_3V;
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else
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ctrl |= EMMC_VCCQ_1_8V;
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sdhci_writel(host, ctrl, SDHC_SLOT_EMMC_CTRL);
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if (ret)
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printf("Signal voltage switch fail\n");
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return ret;
|
||||
}
|
||||
|
||||
static void xenon_mmc_phy_set(struct sdhci_host *host)
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{
|
||||
struct xenon_sdhci_priv *priv = host->mmc->priv;
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|
|
@ -334,6 +392,13 @@ static int xenon_sdhci_set_ios_post(struct sdhci_host *host)
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uint speed = host->mmc->tran_speed;
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int pwr_18v = 0;
|
||||
|
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/*
|
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* Signal Voltage Switching is only applicable for Host Controllers
|
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* v3.00 and above.
|
||||
*/
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||||
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
|
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xenon_mmc_start_signal_voltage_switch(host);
|
||||
|
||||
if ((sdhci_readb(host, SDHCI_POWER_CONTROL) & ~SDHCI_POWER_ON) ==
|
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SDHCI_POWER_180)
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pwr_18v = 1;
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|
|
@ -394,6 +459,18 @@ static int xenon_sdhci_probe(struct udevice *dev)
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/* Set default timing */
|
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priv->timing = MMC_TIMING_LEGACY;
|
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|
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/* Get the vqmmc regulator if there is */
|
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device_get_supply_regulator(dev, "vqmmc-supply", &priv->vqmmc);
|
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/* Set the initial voltage value to 3.3V if there is regulator */
|
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if (priv->vqmmc) {
|
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ret = regulator_set_value(priv->vqmmc,
|
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XENON_MMC_3V3_UV);
|
||||
if (ret) {
|
||||
printf("Failed to set VQMMC regulator to 3.3V\n");
|
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return ret;
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable auto clock gating during init */
|
||||
xenon_mmc_set_acg(host, false);
|
||||
|
||||
|
|
@ -426,7 +503,7 @@ static int xenon_sdhci_probe(struct udevice *dev)
|
|||
host->ops = &xenon_sdhci_ops;
|
||||
|
||||
host->max_clk = XENON_MMC_MAX_CLK;
|
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ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
|
||||
ret = sdhci_setup_cfg(&plat->cfg, host, XENON_MMC_MAX_CLK, 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@ config PCI_AARDVARK
|
|||
bool "Enable Aardvark PCIe driver"
|
||||
default n
|
||||
depends on DM_PCI
|
||||
depends on DM_GPIO
|
||||
depends on ARMADA_3700
|
||||
help
|
||||
Say Y here if you want to enable PCIe controller support on
|
||||
|
|
|
|||
|
|
@ -148,6 +148,7 @@ struct pcie_advk {
|
|||
void *base;
|
||||
int first_busno;
|
||||
struct udevice *dev;
|
||||
struct gpio_desc reset_gpio;
|
||||
};
|
||||
|
||||
static inline void advk_writel(struct pcie_advk *pcie, uint val, uint reg)
|
||||
|
|
@ -613,10 +614,7 @@ static int pcie_advk_probe(struct udevice *dev)
|
|||
{
|
||||
struct pcie_advk *pcie = dev_get_priv(dev);
|
||||
|
||||
#if CONFIG_IS_ENABLED(DM_GPIO)
|
||||
struct gpio_desc reset_gpio;
|
||||
|
||||
gpio_request_by_name(dev, "reset-gpio", 0, &reset_gpio,
|
||||
gpio_request_by_name(dev, "reset-gpios", 0, &pcie->reset_gpio,
|
||||
GPIOD_IS_OUT);
|
||||
/*
|
||||
* Issue reset to add-in card through the dedicated GPIO.
|
||||
|
|
@ -631,15 +629,14 @@ static int pcie_advk_probe(struct udevice *dev)
|
|||
* possible before PCIe PHY initialization. Moreover, the PCIe
|
||||
* clock should be gated as well.
|
||||
*/
|
||||
if (dm_gpio_is_valid(&reset_gpio)) {
|
||||
if (dm_gpio_is_valid(&pcie->reset_gpio)) {
|
||||
dev_dbg(pcie->dev, "Toggle PCIE Reset GPIO ...\n");
|
||||
dm_gpio_set_value(&reset_gpio, 0);
|
||||
dm_gpio_set_value(&pcie->reset_gpio, 1);
|
||||
mdelay(200);
|
||||
dm_gpio_set_value(&reset_gpio, 1);
|
||||
dm_gpio_set_value(&pcie->reset_gpio, 0);
|
||||
} else {
|
||||
dev_warn(pcie->dev, "PCIE Reset on GPIO support is missing\n");
|
||||
}
|
||||
#else
|
||||
dev_dbg(pcie->dev, "PCIE Reset on GPIO support is missing\n");
|
||||
#endif /* DM_GPIO */
|
||||
|
||||
pcie->first_busno = dev->seq;
|
||||
pcie->dev = pci_get_controller(dev);
|
||||
|
|
@ -647,6 +644,16 @@ static int pcie_advk_probe(struct udevice *dev)
|
|||
return pcie_advk_setup_hw(pcie);
|
||||
}
|
||||
|
||||
static int pcie_advk_remove(struct udevice *dev)
|
||||
{
|
||||
struct pcie_advk *pcie = dev_get_priv(dev);
|
||||
|
||||
if (dm_gpio_is_valid(&pcie->reset_gpio))
|
||||
dm_gpio_set_value(&pcie->reset_gpio, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pcie_advk_ofdata_to_platdata() - Translate from DT to device state
|
||||
*
|
||||
|
|
@ -687,5 +694,7 @@ U_BOOT_DRIVER(pcie_advk) = {
|
|||
.ops = &pcie_advk_ops,
|
||||
.ofdata_to_platdata = pcie_advk_ofdata_to_platdata,
|
||||
.probe = pcie_advk_probe,
|
||||
.remove = pcie_advk_remove,
|
||||
.flags = DM_FLAG_OS_PREPARE,
|
||||
.priv_auto_alloc_size = sizeof(struct pcie_advk),
|
||||
};
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@
|
|||
/*
|
||||
* Other required minimal configurations
|
||||
*/
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x06000000 /* default load adr */
|
||||
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
|
||||
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
|
||||
|
||||
|
|
@ -90,12 +90,15 @@
|
|||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
/* fdt_addr and kernel_addr are needed for existing distribution boot scripts */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"scriptaddr=0x4d00000\0" \
|
||||
"pxefile_addr_r=0x4e00000\0" \
|
||||
"fdt_addr_r=0x4f00000\0" \
|
||||
"kernel_addr_r=0x5000000\0" \
|
||||
"ramdisk_addr_r=0x8000000\0" \
|
||||
"scriptaddr=0x6d00000\0" \
|
||||
"pxefile_addr_r=0x6e00000\0" \
|
||||
"fdt_addr=0x6f00000\0" \
|
||||
"fdt_addr_r=0x6f00000\0" \
|
||||
"kernel_addr=0x7000000\0" \
|
||||
"kernel_addr_r=0x7000000\0" \
|
||||
"ramdisk_addr_r=0xa000000\0" \
|
||||
BOOTENV
|
||||
|
||||
#endif /* _CONFIG_MVEBU_ARMADA_37XX_H */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue